11.2 Unidirectional Diode Gates – Pulse and Digital Circuits

11.2 UNIDIRECTIONAL DIODE GATES

A unidirectional gate can transmit either positive or negative pulses (or signals) to the output. It means that this gate transmits pulses of only one polarity to the output. The signal to be transmitted to the output is the input signal. This input signal is transmitted to the output only when the control signal enables the gate circuit. Therefore, we discuss two types of unidirectional diode gates, namely, unidirectional diode gates that transmit positive pulses and unidirectional diode gates that transmit negative pulses.

11.2.1 Unidirectional Diode Gates to Transmit Positive Pulses

In order to transmit positive pulses, the unidirectional gate shown in Fig. 11.3 can be used. The gating signal is also known as a control pulse, selector pulse or an enabling pulse. It is a negative signal, whose magnitude changes abruptly between –V2 and –V1.

Consider the instant at which the gating signal is –V1, which is a reasonably large negative voltage. As a result, D is OFF. Even if a positive input pulse is present when the gating signal with value –V1 is present, the diode D remains OFF since the input may not be sufficiently large to forward-bias it. Hence, the output is zero.

Now consider the duration when the gate signal has a value –V2 (smaller negative value) and when the input is also present (coincidence occurs). Assume that the control signal has peak-to-peak swing of 25 V and the signal has peak-to-peak swing of 15 V.

  1. Let, for example, −V1 = −40 V, − V2 = −15 V and the signal amplitude be 15 V, as shown in Fig. 11.4(a). The net voltage at the anode of the diode, when the input is present for the duration of the gating signal, is 0. The diode is OFF and the output in this case is zero.

    FIGURE 11.3 The unidirectional gate to transmit positive pulses

    FIGURE 11.4(a) The control signal with −V1 = −40 V, − V2 = −15 V and the input amplitude 15 V

  2. Now, change the levels to −V1 = −35 V, − V2 = −10 V and the signal amplitude remains constant at 15 V, as shown in Fig. 11.4(b). Only when the input forward-biases the diode, there is an output. The output in this case is a pulse of amplitude 5 V (assuming an ideal diode). The duration of the output is the same as the duration of the input signal.
  3. Now let −V1 = −30 V, − V2 = −5 V and the signal amplitude be 15 V, as shown in Fig. 11.4(c). As the signal above the zero level is 10 V, the output is a pulse of amplitude 10 V and has the same duration as the input.
  4. Let −V1 = −25 V, − V2 = 0 V and the signal amplitude be 15 V, as shown in Fig. 11.4(d). The output in this case is 15 V and has the same duration as the input.
  5. Let −V2 = +5 V and − V1 = −20 V, as shown in Fig. 11.4(e). In this case, the output not only contains the input but also a portion of the control signal. The desired signal at the output is seen to be riding over a pedestal. We see that the output of the gate changes by adjusting –V2 and in the last case it is seen that the output is superimposed on a pedestal of 5 V. Thus, the output is influenced by the control signal.

    FIGURE 11.4(b) The control signal with V1 = −35 V, − V2 = −10 V and the input amplitude 15 V

    FIGURE 11.4(c) The control signal with V1 = −30 V, − V2 = −5 V and the input amplitude 15 V

    FIGURE 11.4(d) The control signal with V1 = −25 V, − V2 = 0 V and the input amplitude 15 V

    FIGURE 11.4(e) The control signal with V1 = −20 V, − V2 = 5 V and the input amplitude 15 V

For a gating signal, the RC network behaves as an integrator. Hence, the gate signal is not necessarily a rectangular pulse but rises and falls with a time constant RC. As a result, there is a distortion in the gate signal. However, if the duration of the input signal (a pulse) is much smaller than the duration of the gate, this distortion associated with the gating signal is not necessarily transmitted to the output; and the output is a sharp pulse as desired, provided the pedestal is eliminated, as shown in Fig. 11.4(f). On the contrary, if there is a pedestal, there is a corresponding distortion in the output, as shown in Fig. 11.4(g).

The advantages of unidirectional diode gates are: (i) they are simple to implement; (ii) have a negligible transmission delay; (iii) the gate draws no current in the quiescent condition; and (iv) by the proper modification of the circuit, more than one input signal can be transmitted through the gate circuit. However, there are two disadvantages of this arrangement. As the control signal and the input signal are directly connected at X (see Fig. 11.3), there could be an interaction between these two sources. The time constant RC, if properly not chosen, can cause the distortion of the gate signal. A two-input unidirectional diode gate is shown in Fig. 11.5(a).

FIGURE 11.4(f) There is no distortion in the output though the control signal is distorted

FIGURE 11.4(g) The distorted gate signal giving rise to a distorted pedestal

Let Vs1 and Vs2 be the pulses of amplitude 5 V. When both these signals appear at the input simultaneously, having the same duration, the output is shown in Fig. 11.5(b), when −V1 = −25 V and −V2 = 0.

When the control signal is at −V2 (= 0 V), and if both the inputs are 0 the output is zero. When the inputs are above 0, the output is 5 V. However, when the control input is at −V1 (−25 V), no output is available. This negative control signal inhibits the gate. Hence, this circuit is a two-input OR gate with −V1 (−25 V) and inhibiting the gate operation. The waveforms shown in Fig. 11.5(b) suggest that time division multiplexing can be employed to simultaneously transmit a number of signals. The limitation of this arrangement is that signal sources may load the control input. To overcome this disadvantage, an arrangement in which the signal sources avoid loading the control input is suggested in Fig. 11.6. Here, the input signals are connected to point X through diodes D1 and D2 whereas the control source is connected at X directly to avoid interference and loading.

FIGURE 11.5(a) A unidirectional two-input diode gate

FIGURE 11.5(b) The waveforms of a two-input unidirectional gate

FIGURE 11.6 A two-input diode gate that avoids loading on the control signal

11.2.2 Unidirectional Diode Gates

  1. A unidirectional diode coincidence gate (AND gate): In certain applications, it may become necessary that the input be transmitted to the output only when a set of conditions are simultaneously satisfied. In such cases, a coincidence gate is employed. A unidirectional diode coincidence (AND) gate is shown in Fig. 11.7(a).

    When any of the control voltages is at −V1(−25 V), point X is at a larger negative voltage, even if the input pulse Vs (15 V) is present. Do is reverse-biased. Hence, there is no signal at the output.

    FIGURE 11.7(a) A unidirectional diode AND gate with multiple control signals

    FIGURE 11.7(b) The waveforms of the coincidence (AND) gate

    When all the control voltages, on the other hand, are at −V2 (0 V), if an input signal Vs (15 V) is present, D0 is forward-biased and the output is a pulse of 15 V. Thus, only when all the control signals are at 0 V (1 level) and if an input signal is present, then it is transmitted to the output. Hence, this circuit is a coincidence circuit or AND circuit, as shown in Fig. 11.7(b).

  2. A unidirectional diode OR gate: Consider the gate circuit shown in Fig. 11.8(a). Let the control voltages vary from −50 V to 0 V. If any control signal VC (say VC1) is at 0 V, D1 conducts and behaves as a short circuit. Then the resultant circuit is shown in Fig. 11.8(b). If Rs is 1 kΩ and if I is specified as 1 mA then R = 149 kΩ. The voltage at X is now at −1 V.

    Hence, D0 is reverse-biased and is an open circuit; and so the output is zero. Now, if a pulse Vs (= 10 V) is applied at the input, D0 is forward-biased and D1 and D2 are reverse-biased. The output is 10 V.

    FIGURE 11.8(a) An OR sampling gate

    FIGURE 11.8(b) The circuit of Fig. 11.8(a) when any of the control signals and inputs is zero

    Thus, the circuit shown in Fig. 11.8(a) is a gate that transmits the input signals to the output when any one of the control inputs is 0 V (1 level). This circuit is an OR circuit. The waveforms are shown in Fig. 11.8(c). The truth table, given in Table. 11.1 with control signals as logical inputs, verifies the OR operation. We see from the waveforms shown in Fig. 11.8(c) and Table.11.1 that the output is 0 V (0 level) for input pulses 4 and 8, for which both the control signals are −50 V (0 level).

  3. Unidirectional diode gate that eliminates pedestal: In the unidirectional gates discussed till now, if the upper level of the gating signal (−V2) is exactly zero volts, the gate is enabled and an input is faithfully transmitted to the gate output terminals. The output can also be derived if –V2 is a positive voltage (say 5 V). In this case, the output will have a pedestal and the signal is superimposed on it. To ensure that the output is a faithful replica of the input even if the upper level of the control signal is positive (i.e., to eliminate pedestal), the circuit shown in Fig. 11.9(a) is employed.
    1. If the input Vs is zero and if the enabling control signal is not present, D1 conducts and the negative voltage at X reverse-biases D0 and V0 = 0, shown in Fig. 11.9(b).

       

      TABLE 11.1 The truth table of the OR gate with control signals as logical inputs

      FIGURE 11.8(c) The waveforms of the OR gate shown in Fig. 11.8(a).

      FIGURE 11.9(a) A sampling gate that is insensitive to the upper level (−V2) of the control signal

      FIGURE 11.9(b) The circuit of Fig. 11.9(a) when Vs = 0 and the control signal is absent

      FIGURE 11.9(c) The circuit when the control signal is positive and the input is present

    2. If the control voltage is now positive, D1 is reverse-biased and is OFF, as shown in Fig. 11.9(c). An input signal Vs (a positive pulse) ensures conduction of D0 and hence, the input signal is present at the output for the duration of the control signal. There is no pedestal in the output even though the control signal has a positive voltage as its upper level.

11.2.3 A Unidirectional Diode Gate to Transmit Negative Pulses

A unidirectional diode gate is shown in Fig. 11.3, to transmit the positive pulses when the gating signal is present. Similarly, a unidirectional diode gate to transmit negative pulses can be constructed as shown in Fig. 11.10. The difference between these two gates is that the input signals are negative pulses and the gating signal varies between V1 and V2 as shown in Fig. 11.10 and the diode is connected in the opposite direction.

When the gating signal is at V1, the voltage at X is a large positive voltage as a result D is reverse-biased. If an input signal is now present until the magnitude of the input is more negative than the positive voltage at X, the diode will not conduct, i.e., for the diode to conduct and thus transmit the signal to the output, the input is required to have a large negative value. Even if the diode conducts only the peak of the input will be transmitted to the output, but not the entire input signal. On the other hand, when the amplitude of the gating signal is V2, a small positive voltage, if a negative pulse is present at the input it can make the diode conduct. As such the output is present when the gating signal is at V2.