11.5 Applications of Sampling Gates – Pulse and Digital Circuits

11.5 APPLICATIONS OF SAMPLING GATES

Sampling gates find applications in many circuits. Sampling gates are used in multiplexers, D/A converters, chopper stabilized amplifiers, sampling scopes, etc. Here, the three specific applications of the sampling gates in: chopper stabilized amplifier; sampling scope and time division multiplexer are discussed.

11.5.1 Chopper Stabilized Amplifiers

Sometimes it becomes necessary to amplify a signal v that has a very small dv/dt and that the amplitude of the signal itself is very small, typically of the order of milli-volts. Neither, ac amplifiers using large coupling condensers nor dc amplifiers with the associated drift would be useful for such an application. A chopper stabilized amplifier employing sampling gates can be a useful option in such an application, as shown in Fig. 11.27(a).

FIGURE 11.27(a) A chopper stabilized amplifier

Let the input vs to the amplifier be a slowly varying sinusoidal signal. Switch S1 and S2 open and close synchronously at a fast rate i.e., the switching frequency is significantly larger than the signal frequency. When S1 is open, vi is the same as vs. When S1 is closed, vi = 0. As the switching frequency is large, the samples are taken at smaller time intervals. With the result, the signal vi contains pulses with almost flat tops and have the same amplitude of the input signal as is available at the instant of sampling. As a result, the input of the amplifier vi is a chopped signal—R and S1 constitute the chopper. Hence, vi can be described as a square wave at the switching frequency (if dv/dt is small), i.e., amplitude modulated by the input signal and superimposed on a signal (dashed line) that is proportional to vs. The waveform vA at the amplifier output is an amplitude modulated square wave, as shown in Fig. 11.27(b). Hence, a chopper is also called a modulator.

Let S1 and S2 operate in synchronism. During t = T1, the negative going component of vA is zero and during t = T2 the positive going component is zero. Also, because of the amplifier, vo is greater than vi in amplitude. Except for this change, vA is similar to vi, as shown in Fig. 11.27(c). This signal is passed through a low pass filter which eliminates the square wave and retrieves the original signal. If S2 opens when S1 is closed, the output is shifted in phase by 180°, as shown in Fig. 11.27(d). C and S2 constitute a synchronous detector. The chopper eliminates the need for a dc stabilized amplifier. This amplifier is called a chopper stabilized amplifier.

11.5.2 Sampling Scopes

Another application of a sampling gate is in a sampling scope used to display very fast periodic waveforms, having a rise time of the order of nano-seconds. A general purpose CRO may be used for displaying such waveforms. However, a CRO needs a wideband amplifier. A sampling scope eliminates the use of the high gain wideband amplifier. The basic principle of a sampling scope is explained with the aid of a block diagram shown in Fig. 11.28(a) and the waveforms are shown in Fig. 11.28(b).

FIGURE 11.27(b) The waveforms of the chopper stabilized amplifier

FIGURE 11.28(a) The waveforms that explain the principle of sampling-scope

Let the trigger signals shown in Fig. 11.28(a) occur slightly prior to the occurrence of the pulses that are to be displayed on the screen. These trigger signals trigger ramp and staircase generators. The staircase generator has constant amplitude between the triggers and its amplitude jumps to a higher level at the instant the trigger is present. The amplitude of the staircase generator remains the same till the presence of the next trigger. The inputs to the comparator are the staircase and ramp signals. The instant the ramp reaches the amplitude of the staircase signal; a pulse is produced at the output of the comparator. This pulsed output of the comparator is used as the control signal for the sampling gate. When a control signal is present, the gate transmits a sample of the signal to the vertical amplifier whose amplitude is the same as that of the signal at the instant of sampling and has the same duration as the control signal. Points 1, 2…, 6 are the instants at which the samples are taken. The output of the staircase generator is connected to the horizontal deflecting plates.

When one sample is taken, say at instant 1, to go to the next sample, i.e., sample 2, the amplitude of sample 1 should be held constant till the next trigger pulse arrives. Therefore, it becomes necessary to hold the amplitude of the input signal between successive triggers and hence, the need for a stretch and hold circuit. The staircase generator moves the spot horizontally across the screen in steps and at each step the spot is deflected vertically proportional to the signal amplitude. The CRT beam is blanked normally and is un-blanked only at the time of display of the sample. Thus, the signal is represented by a series of dots.

11.5.3 Multiplexers

An analog time division multiplexer using a sampling gate is shown in Fig. 11.29(a). In the FET Q1, Q2 and Q3 are ON when the control voltages VC1, VC2 and VC3 are at 0 V. The voltage V is more negative than the pinch off voltage of the FET. As such the FET is OFF when the gate voltage is V. During the period 0 to T1, VC1 is such that Q1 is ON. At the same time Q2 and Q3 are OFF. Hence, input Vs1, which is the sinusoidal signal is present at the output during this period. During the period T1 to T2, Q2 is ON and Q1 and Q3 are OFF. Hence, only Vs2 is present at the output during this period. During the period T2 to T3, Q3 is only ON and hence, Vs3 is present at the output. The output now contains all the input signals separated by a specific time interval, as shown in Fig. 11.29(b).

FIGURE 11.29(a) The sampling gate used for time division multiplexing

FIGURE 11.29(b) The control signals and the output of the multiplexer

SOLVED PROBLEMS

Example 11.5: In the circuit shown in Fig. 11.16(a), RL = R1 = 200 kΩ, R2 = 100 kΩ and the signal has a peak value of 10 V. Find (a) A (b) VC(min) (c) Vn(min) (d) Ri

Solution:

  1. Therefore,

  2. R3 = R + RfR = 66.6 kΩ

    VC(min) = 0.71 V

  3. When the diodes are ON

Example 11.6: For the four-diode gate shown in Fig 11.20(a), RL = R2 = 50kΩ and R1 = 1kΩ, Rf =25 Ω, Vs = 10 V. Calculate (a) A (b) V(min) (c) VC(min) (d) for V = V(min)

Solution:

  1. We have

    And

    R3 = 980 + 25 = 1005Ω

    and . Therefore,

    A = 0.97

  2. VC(min) = A Vs = 0.97 × 10 = 9.7 V

  3. Here, V = V(min) = 4.97 V

    Therefore,

Example 11.7: For the FET series gate shown in Fig. 11.30. Vs = ±1 V, Rs = 50 Ω, RL = 20 kΩ. The FET has the following parameters, VGS(OFF)max = −10 V and RD(ON) = 20 Ω. Calculate the voltage levels of the control signal, ID, error due to RS and error due to RD(ON).

FIGURE 11.30 The FET series gate

Solution:

The control signal should have a value V1 for Q1 to be ON.

Therefore, V1 = Vs(peak) = 1 V.

For Q1 to be OFF, the control signal should be –V2

 

V2 = −[Vs(peak) + VGS(OFF)max + 1 V]

V2 = −(1 + 10 + 1) = −12 V

IDRS = 49.8 × 10−6 × 0.05 × 103 = 2.49 mV

IDRD(ON) = 49.8 μA × 20 Ω = 0.996 mV

SUMMARY
  • A sampling gate is used to transmit a signal faithfully from the input to the output terminals during a specified time interval. This time interval is decided by the external gating signal, also called the control signal.
  • Sampling gates are of two types — unidirectional and bidirectional.
  • A unidirectional sampling gate transmits a signal of only one polarity, either positive or negative.
  • A bidirectional sampling gate transmits signals of both positive and negative polarities.
  • Sometimes, in the output of a sampling gate, it is possible to get the signal superimposed on the control signal. Then the signal is said to be on a pedestal which is the part of the control signal available in the output. Pedestal is undesirable in the output.
  • A sampling gate can be wired in such a fashion that it will transmit the signal only when a number of gating signals are present simultaneously. Such a sampling gate is called an AND circuit or coincidence circuit.
  • It is possible to suppress the pedestal. However, if the gating signals have non-zero rise time and fall time, spikes may be generated at the output.
  • A chopper amplifier employs a sampling gate. A chopper amplifier is used to amplify a small signal whose rate of change with time is small.
  • A sampling gate is also employed in a sampling scope. A sampling scope is one in which the display consists of a sequence of samples of the input signal. These samples are taken at successively delayed time intervals with respect to a reference on the signal.
  • The gain of a sampling gate—A—is defined as the ratio of the output signal to the input signal during the transmission.
MULTIPLE CHOICE QUESTIONS
  1. A circuit that allows transmission faithfully during a fixed time interval is called a:
    1. Logic gate
    2. Flip-flop
    3. Sampling gate
    4. Schmitt trigger
  2. The duration for which signal transmission takes place in a sampling gate is described by a:
    1. Gating signal
    2. Exponential signal
    3. Sinusoidal signal
    4. Ramp
  3. A sampling gate that allows the transmission of a signal of only one polarity is called:
    1. Bidirectional gate
    2. Unidirectional gate
    3. Logic gate
    4. Flip-flop
  4. A sampling gate that allows the transmission of signals of both positive and negative polarity is called:
    1. Bidirectional gate
    2. Unidirectional gate
    3. Logic gate
    4. Flip-flop
  5. The dc voltage present in the output of a sampling gate along with the desired signal is termed as:
    1. Pedestal
    2. Noise
    3. Gain
    4. None of the above
  6. A chopper amplifier is employed to amplify:
    1. Small signals with small dV/dt
    2. Large signals with large dV/dt
    3. Small signals with large dV/dt
    4. Large signals with small dV/dt
  7. To display the shape of the waveform, some times a sequence of samples delayed in time with respect to a reference point are used in an instrument named as:
    1. Sweep generator
    2. Television
    3. Sampling scope
    4. None of the above
SHORT ANSWER QUESTIONS
  1. What is a sampling gate? How does it differ from a logic gate?
  2. What are unidirectional and bidirectional sampling gates?
  3. Explain when a pedestal is seen in the output of a sampling gate.
  4. What is a chopper amplifier? Name its applications.
  5. Explain the basic principle employed in a sampling scope.
LONG ANSWER QUESTIONS
  1. Explain with the help of a neat circuit diagram the working of a bidirectional transistor sampling gate. Suggest a circuit that minimizes or eliminates the pedestal.
  2. Draw the circuit of a bidirectional sampling gate and derive the expression for its gain. Obtain the values of VC(min) and Vn(min).
  3. Draw the circuit of a four-diode sampling gate and explain its operation. Derive the expression for (i) VC(min) and (ii) A.
  4. Write short notes on
    1. Chopper stabilized amplifiers
    2. Sampling scopes
    3. Multiplexers
UNSOLVED PROBLEMS
  1. In the circuit of Fig. 11.16(a), RL = R1 = 50 kΩ, R2 = 40 kΩ and the signal has a peak value of 5 V. Find (i) A (ii) VC(min) (iii) Vn(min) (iv) Ri.
  2. For the four-diode gate shown in Fig. 11.20(a), RL = R2 = 150 kΩ and R1 = 2kΩ, Rf = 25 Ω, Vs = 20 V. Calculate (i) A (ii) V(min) (iii) VC(min) (iv) for V = V(min) find Vn(min).
  3. For the four-diode gate as shown in Fig. 11p.3, Vs = 10 V, Rf = 50 Ω, RL = RC = 200 kΩ, R = Rs = 1kΩ. Find Vn(min), A and VC(min).

    FIGURE 11p.3 The given four-diode gate with balancing resistance