## Chapter 4

## Nodal Analysis and Mesh Analysis of Memoryless Circuits

##### CHAPTER OBJECTIVES

*To introduce the circuit analysis problem and explain the constraints that exist in various equation sets.**To define node voltage variable and develop nodal analysis technique for memoryless circuits containing resistors, dependent voltage and current sources and independent voltage and current sources.**To introduce Nodal Conductance Matrix***Y**and its properties.*To illustrate nodal analysis technique through a series of solved examples.**To define mesh current variable and develop mesh analysis technique for memoryless circuits containing resistors, dependent voltage and current sources and independent voltage and current sources.**To introduce Mesh Resistance Matrix***Z**and its properties.*To illustrate mesh analysis technique through a series of solved examples.**To show that any voltage variable or current variable in a memoryless circuit can be expressed as a linear combination of independent voltage and current source functions.*

##### INTRODUCTION

A memoryless circuit contains a set of memoryless elements interconnected and driven by independent voltage sources and/or current sources. We deal with two systematic procedures for analysing such circuits in this chapter. These analysis procedures are called* nodal analysis* and* mesh analysis.* Nodal analysis procedure is applicable to any circuit. However, mesh analysis procedure is applicable to only a subclass of circuits called* planar networks.*

These two analysis procedures are developed and illustrated in the context of memoryless circuits in this chapter. However, they are very well applicable to dynamic circuits as well. We will extend these procedures to dynamic circuits in later chapters.

A linear time-invariant memoryless circuit can contain linear resistors (*i.e.,* resistors that obey Ohm’s law) and linear dependent sources. Linear dependent sources can be of four kinds. A* Voltage-Controlled Voltage Source* (VCVS) outputs a voltage equal to* k _{v}v_{x}* V where

*k*is a dimensionless constant and

_{v}*v*is the voltage across

_{x}*some other element*or

*combination of elements*in the circuit. A

*Current-Controlled Voltage Source*(CCVS) outputs voltage equal to

*k*V where

_{z}i_{x}*k*is a

_{z}*transfer-resistance*and

*i*is the current through

_{x}*some other element*in the circuit. A

*Current-Controlled Current Source*(CCCS) produces a current equal to

*k*A where

_{i}i_{x}*k*is a dimensionless constant and

_{i}*i*is the current through

_{x}*some other element*in the circuit. A

*Voltage-Controlled Current Source*(VCCS) produces a current equal to

*k*A where

_{y}v_{x}*k*is a

_{y}*transfer-conductance*and

*v*is the voltage across

_{x}*some other element*in the circuit. In addition to linear resistors and linear dependent sources, the circuit will also contain independent voltage sources and independent current sources. Independent voltage sources and current sources are

*non-linear elements.*

##### 4.1 THE CIRCUIT ANALYSIS PROBLEM

Let such a memoryless circuit contain* b* elements interconnected to form* n* nodes and* l* loops. Each two-terminal element has two variables associated with it – a voltage and a current variable. Thus, there are 2*b* variables to be solved for in the circuit analysis problem. Each element is also associated with a terminal* v – i* relationship that yields an equation called the* element equation.* Ohm’s law gives the element equation of a resistor. The element equation of a linear dependent source is given in the form indicated in the last paragraph.

Thus, we have* b* element equations available and we need* b* more equations to solve for 2*b* variables.

These* b* equations are obtained by applying KVL and KCL constraints in the circuit. We get a KCL equation at each node and hence there are* n* KCL constraint equations available. However, we had noted earlier that only* n –* 1 of them will be independent. Thus, we need another set of* b – n +* 1 independent equations to solve the circuit. These are provided by the KVL constraints. There are* l* KVL constraint equations available where* l* is the number of loops in the circuit. The number of loops in the circuit will invariably be greater than* b – n +* 1. Not all of the* l *KVL equations are useful. Some of them can be obtained from others by forming linear combinations. However, it will be possible to find an independent set of* b – n +* 1 equations from* l* equations. Moreover, the maximum number of equations that can be there in an independent set of equations drawn from these* l* loop KVL equations will be exactly* b – n +* 1. However, the choice of equations is not unique. That is, it will be possible to find many sets of independent equations, each set containing* b – n +* 1 equations from the set of* l* KVL equations. Consider the circuit shown in Fig. 4.1-1.

**Fig. 4.1-1** A memoryless circuit with all element variables identified

This circuit has 9 elements, 7 nodes and 6 loops. The element variables are marked in the circuit diagram. The direction of current in each resistor is arbitrary. However, once the current direction is chosen, the voltage polarity will follow from the passive sign convention that is being followed. In the case of voltage sources, the polarity of voltage variable is usually selected to coincide with the stated polarity of the source and the current direction is set as per the passive sign convention.

The KCL equations at all the seven nodes are listed below. We follow a certain sign convention in writing the KCL equation at a node. We write the KCL equation as* sum of currents leaving the chosen node is equal to zero.*

We will call the KCL equation at a node as the* node equation* at that node from this point onwards. Obviously, this set of seven node equations do not form an independent set since the KCL equation at the Node R can be obtained by adding the KCL equations at all the other nodes. Any set of node equations containing six equations will be an independent set of equations in this circuit.

We usually assign one of the nodes in the circuit as a* reference node* in the sense that voltages of various other nodes will be defined and measured with respect to this node. Any node can be set as reference node in theory. However, in practice, the choice will be obvious since there will be such a node which forms a common point of reference for applying inputs and measuring outputs. If such a choice is not obvious, the practical convention is to set that node which has maximum elements connected to it as the reference node.* The KCL equation for reference node is dropped and the KCL equations at the remaining nodes are chosen as a set of* (*n* – 1)* independent equations in circuit analysis.*

Now, we shift our attention to the KVL equations written for six loops. Here too, we follow a certain convention in writing the KVL equations. We start at the leftmost corner of a loop and traverse it in the clockwise direction until we get back to the starting point. As we go along, we enter the element voltages in the equation with the polarity that we see first. That is, if we meet an element voltage at its positive polarity first, we enter that voltage variable with positive sign, and, if we meet an element voltage at its negative polarity first, we enter that variable with negative sign.

Obviously, these six equations do not form an independent set. For example, the first three will add up to the last one. The first two will add up to the fourth one. Second and third will add up to the fifth. Thus, the last three are not independent equations. The first three are independent since each contains at least one voltage variable that does not figure in the other two. Hence, we may accept the first three as the independent set of three KVL equations. However, there are other possible choices too. For instance, the first two and the last will form an independent set of three equations.

Thus, we have six independent KCL equations and three independent KVL equations making up nine equations involving 18 variables – 9 current variables and 9 voltage variables. The remaining nine equations come from element equations. The complete set of 18 equations needed to solve for 18 variables are listed below.

*v*_{1}(*t*), *v*_{2}(*t*), *v*_{3}(*t*) and *v*_{4}(*t*) are the time-functions which describe the voltage delivered by the independent voltage sources.

Thus, we have 18 equations in 18 unknowns. They come in three sets – the first set consists of (*n* – 1) KCL equations, the second set contains (*b *–* n +* 1) KVL equations and the third set contributes *b* element equations. Can we simplify this problem and reduce the number of variable we have to deal with? This is where the systematic procedures we set out to develop in this chapter come into focus.

Nodal Analysis uses the second and third set of equations (KVL and element equations) to eliminate variables, reduces the number of pertinent variables to (*n*–1) node voltage variables and uses the first set of equations (KCL equations) to solve for these variables.

Mesh Analysis uses the first and third set of equations (KCL and element equations) to eliminate variables, reduces the number of pertinent variables to (*b*–*n*+1) mesh current variables and uses the second set of equations (KVL equations) to solve for these variables.

We develop the method of Nodal Analysis first through a series of examples that follow.

##### 4.2 NODAL ANALYSIS OF CIRCUITS CONTAINING RESISTORS AND INDEPENDENT CURRENT SOURCES

The example circuit that we employ to discuss nodal analysis is shown in Fig. 4.2-1. It has 9 elements and 4 nodes. It is driven by three independent current sources* I*_{1},* I*_{2} and* I*_{3}. All the element voltage and current variables adhering to passive sign convention have been identified, though, not labelled. The labelling scheme is the same as the one we employed in the previous section.

**Fig. 4.2-1** Example circuit with resistors and independent current sources for nodal analysis

The node that has largest number of elements connected to it is taken as reference node R and is indicated by a thick line in the diagram.

This circuit has a solution. Certain finite voltages will exist across elements and certain finite currents will flow through them. We can measure voltage across elements by connecting a voltmeter across them. Now, assume that the resistor *R*_{6} is removed. Obviously, the circuit will have a different solution. However, note that with *R*_{6} removed, there is no element connected directly from node-3 to reference node. We can still connect a voltmeter between node-3 and reference node and get a finite reading that indicates the voltage of node-3 with respect to the reference node. This measured voltage is* not* the voltage across any element (we are assuming that *R*_{6} is removed). Thus, we see that each node in the circuit will have a voltage difference with respect to the reference node quite irrespective of whether that voltage can be identified as the voltage across some element or other. These voltages are called* node voltages.* Node voltage is the voltage of a node in a circuit with respect to a chosen reference node in the circuit.

We observe that all the three node voltage variables are identifiable as element voltages in this circuit. However, this need not be the case always.

If the node voltages are known, the element voltages may be calculated as linear combination of node voltages. After all, an element has to be connected between two nodes. If one of them is reference node itself, then the element voltage is equal the node voltage of the other node or negative of that. If both nodes are different from reference node, then the element voltage will be the difference between the node voltages at those two nodes.

Three node voltage variables are identified and labelled as *v*_{1}, *v*_{2} and *v*_{3} in the circuit. Since reference node is the node with respect to which the other node potentials are defined, no node voltage variable needs to be assigned for it. Its node voltage is zero by definition.

Now, apply KVL to get equations relating the element voltages to node voltages. For example, consider the loop formed by R-Node-l-Node-2-R. KVL in this loop gives,

All element voltages may be related to the three node voltages in this manner by inspection.

We observe that all element voltages can be obtained either as some node voltage straightaway or as difference between two node voltages. Hence, a set of (*n –* 1) node voltages, defined with respect to the reference node, is a sufficient set of voltage variables for determining* b* element voltages. Note that we are using KVL equations to reduce the number of pertinent voltage variables to (*n –* 1) from* b.*

The KCL equations remain. We use them to solve for these node voltages. But KCL equations are written in terms of currents. This is where the element equations come in. We substitute element equations in KCL equations as and when we write KCL equations in order to substitute for element currents in terms of element voltages. Of course, element voltages will be expressed in terms of node voltages only. Thus, writing node equations at the* n –* 1 nodes (because only* n –* 1 KCL equations are independent) involves two mental operations for each element – obtain element voltage in terms of node voltages and replace current variable by voltage variable with the help of element equation. We illustrate this for node-1 in the circuit in Fig. 4.2-1.

We write KCL at this node by equating the sum of currents* going away from the node* to zero.

where* G* represents the conductance value (1/*R*) of corresponding resistance. The third equation, which is the final form of node equation, can be written by inspection without writing out the first two explicitly. With our convention of positive sign for current flowing away from the node, the node voltage variable at the node where KCL is being written will appear with positive sign and other node voltage variables will appear with negative sign in the equation. Moreover, the* net current delivered by current sources* to that node will appear with* positive sign on the right side* of equation. The remaining two node equations for this circuit are

We can solve for *v*_{1}, *v*_{2} and *v*_{3} using the three equations listed below:

The element voltages may be found out subsequently by using Eqn. 4.2-1 and the element currents may be obtained by using element equations in the last step.

We followed a certain convention in writing the node equations in Eqn. 4.2-2. Adhering to such a convention has yielded certain symmetry in these equations. Let us express these equations in matrix notation to see the symmetry clearly.

* Y *is called the

*Nodal Conductance Matrix,*is called the

**V***Node Voltage Vector,*is called the

**U***Input Vector*and

*is called the*

**C***Input Matrix.*

Note that the order of Nodal Conductance matrix is (*n* – 1) × (*n* – 1) and that it is* symmetric.* The diagonal element of* Y* matrix,

*y*, is the

_{ii}*sum of conductances connected at the node-i.*The off-diagonal element of

*Y*matrix,

*y*, is the

_{ij}*negative of sum of all conductances connected between node-i and node-j.*There can be more than one conductance connected between two nodes. Then, they will be in parallel and they will add in

*y*That is why

_{ij}.*y*should be the negative of

_{ij}*sum*of all conductances connected between

*node*

*-i*and

*node*

*-j.*The right-hand side product

*is a column vector of*

**CU***net current injected by the current sources at the corresponding nodes.*

Now, we can write down this matrix equation by inspection after skipping all the intermediate steps. The following matrix equation results in the case of the example we considered in this section.

Solving the matrix equation by Cramer’s rule, we get,

The element voltages can be calculated by using Eqn. 4.2-1 or by inspection. Similarly, the element currents may be obtained by inspection. The complete solution is marked in the circuits appearing in Fig. 4.2-2.

**Fig. 4.2-2** Nodal analysis solution for circuit in Fig. 4.2-1

This section has shown that an *n*-node circuit containing only linear resistors and independent current sources will have a nodal representation given by* YV = CU,* where

*is the nodal conductance matrix of order (*

**Y***n*–

*1*)

*×*(

*n*–

*1*)

*,*is the node voltage column vector of order (

**V***n*–

*1*)

*×*1,

*is the source current column vector of order*

**U***n*1 and

_{cs}×*is the input matrix of order (*

**C***n*–

*1*)

*× n*.

_{cs}*n*is the number of independent current sources in the circuit.

_{cs}Equivalently, the matrix product* CU* may be replaced by a column vector which contains the

*net current delivered to a node by all current sources connected at that node.*The nodal conductance matrix will be symmetric for this kind of circuits. The node voltage vector is obtained by Cramer’s rule or by Matrix inversion as

*.*

**V**=**Y**^{–}^{1}**CU**Element voltages and currents may be obtained in terms of node voltages by inspection subsequently. For instance, left end of *R*_{2} is at 2 V with respect to reference node and right end is at 1 V. Hence, *v*_{R2 }is 2 – 1 = 1 V and its current is 1 V/1 Ω = 1 A.

##### 4.3 NODAL ANALYSIS OF CIRCUITS CONTAINING INDEPENDENT VOLTAGE SOURCES

We extend the nodal analysis technique we developed in the previous section to circuits containing independent voltage sources in addition to independent current sources in this section.

An independent voltage source can appear in three positions in a circuit. It may appear from a node to the reference node. Secondly, it may appear between two nodes at which more than two elements are incident. Thirdly, it may appear in series with some resistor. We deal with the first two cases in this section and take up the third case in the next section.

The circuit in Fig. 4.3-1 shows the first case.

**Fig. 4.3-1** Circuit showing a node voltage getting fixed by a voltage source

We identify the reference node and assign node voltage variables at other nodes as the first step in nodal analysis of circuits. The reference node and the remaining three nodes are identified in the circuit in Fig. 4.3-1. However, only two node voltage variables are assigned; the third node voltage variable is not shown assigned. The reason is obvious. The independent voltage source connected directly from that node to reference node* fixes* or* constrains* that node voltage to be at the source value. Thus, the number of node variables to be solved for has come down to 2 from 3. This, in general, is the effect of voltage sources in a circuit as far as nodal analysis is concerned. Each such voltage source imposes one constraint on the degree of freedom the circuit has and reduces the number of node voltage variables by one.

Thus, we have only two unknown node voltage variables in this 3-node + reference node problem. We write the two node equations as below.

We do not have to write the third node equation since we know that *v*_{3} = *V*_{1}. Let us cast these equations in matrix form.

The matrix equation has come out in the form of* YV* =

*again. We note that the*

**CU***matrix is symmetric. However, the*

**Y***vector now has four entries – three current source values and one voltage source value. We note carefully that the*

**U***matrix has suitable entries that convert the V units into A. Thus, the matrix product*

**C***is a column vector of currents since a voltage multiplied by conductance is a current.*

**CU**Moreover, we observe that, the form and entries of* Y *matrix on the left-hand side of equation cannot depend on the particular values of

*I*

_{1},

*I*

_{2},

*I*

_{3}and

*V*

_{1}. The matrix must be the same for any numerical values for these four inputs. Therefore,

*matrix entries must be the same for a case where all these inputs are zero-valued. However, an independent current source of zero value is an open circuit and an independent voltage source with zero value is a short-circuit ! Therefore, it should be possible to write down that matrix by inspection after we deactivate all the sources in the circuit. The deactivated circuit is shown in Fig. 4.3-2.*

**Y****Fig. 4.3-2** Circuit in Fig. 4.3-1 with all independent sources deactivated

The resistor *R*_{6} simply goes out of picture due to the short-circuit across it. *R*_{5} gets connected between node-2 and reference node. *R*_{3} gets connected between node-1 and reference node. We write the** Y**-matrix of this circuit by using the rules we developed in the last section.

We find that this is the same as the** Y**-matrix in Eqn. 4.3-2. Thus, we conclude that

*an independent voltage source directly at a node in a circuit results in a reduction of node voltage variables by one and in a reduction of order of nodal conductance matrix by one. The nodal conductance matrix remains symmetric.*The nodal conductance matrix may be found by using the deactivated circuit, if necessary. However, the node equations will have to be written in order to get the right-hand side of Eqn. 4.3-2.

The resistor* R _{6}* disappearing altogether in the analysis is an interesting aspect. We observe that the value of conductance of this resistor does not appear anywhere in Eqn. 4.3-2. Thus, it has no effect on the node voltages. We may even remove it when we write the equations for node voltage variables. Why is it so? For the simple reason that the voltage source has fixed the node potential at the third node and presence or absence of

*R*

_{6}has no effect on that fact. Since node potentials decide the voltage across all elements and currents through them, the rest of the circuit is totally unaffected by the value of

*R*

_{6}

*.*The only element that gets affected by

*R*

_{6}(apart from itself!) is the voltage source. Its current will have a component due to

*R*

_{6}.

*We may treat a resistor across an independent voltage source as a trivial element.*

Substituting the values for conductances and source functions in Eqn. 4.3-2 we get,

and the solution is *v*_{1} = 2V and *v*_{2} = 1V.

Now, the voltages across all the resistors and the current sources may be found by inspection. Similarly, the currents through resistors can be found by applying Ohm’s law to them. Currents through current sources are already known. What remains is the current in the voltage source. An extra step has to be carried out for finding out the current in *V*_{1}. This is the price that the voltage source demands from us for fixing the node-3 potential for us!

The extra step involves applying KCL at node-3. Note that we did not use the KCL equation at node-3 in the process of solving for node voltage variables. We use it now. All the other currents leaving or entering node-3 are known. Only the current through *V*_{1} is unknown. Hence, it can be found.

Note that the trivial element, *R*_{6}, is accounted now. Thus, the current in the 3V source is –6A into the positive terminal,* i.e.,* 6 A out of the positive terminal. Fig. 4.3-3 shows the complete solution of the circuit.

**Fig. 4.3-3** Complete solution for the circuit in Fig. 4.3-1

Next, we consider a case in which an independent voltage source appears across two nodes other than the reference node. See the circuit in Fig. 4.3-4.

**Fig. 4.3-4** Circuit with an independent voltage source across two nodes

The independent voltage source* V*_{1} constrains the voltage at node-3 to be above the voltage at node-2 by *V*_{1} V. If we know one of them, we can find the other. Hence, only one of them – either *v*_{2} or *v*_{3} – needs be assigned. Node-1 is not constrained in any way and hence needs to be assigned a node voltage variable. Hence,* v*_{1} and* v*_{2} are assigned as shown. It could have been* v*_{1} and* v*_{3} with no difference to the final solution. Thus, here too, we find that an independent voltage source imposes a constraint on node voltage variables and reduces the number of node voltage variable by one.

*We write the KCL equation *(*or node equation*)* at all the nodes except at reference node.* We make use of the constraint equation *v*_{3} = *v*_{2} + *V*_{1} wherever we need *v*_{3} in the process of writing node equations at node-1 and node-2.

The resulting equations are

We get rid of *i*_{V1} > by adding the last two equations and end up with two equations in two unknowns.

Note that the resistor *R*_{5} and current source* I*_{3} which are directly across the voltage source disappear from the equations. They become* trivial elements.* They do not affect the node voltages and hence voltage and current of other elements. They affect only the current through the voltage source.

The Eqn. 4.3-3 can be expressed in matrix form as

The matrix equation has come out in the form of * YV* =

*again. We note that the*

**CU***matrix is symmetric. Moreover, the*

**Y***-matrix can be obtained from the deactivated circuit as in the earlier case.*

**Y**Substituting values for conductances and the source functions, we get,

The solution is *v*_{1} = 2V and *v*_{2} = 1V. The current through the voltage source can be obtained by applying KCL at node-2 or node-3. Using node-3,

Note that the trivial elements* R*_{5} and* I*_{3} came back in this equation. The complete solution is shown in Fig. 4.3-5.

**Fig. 4.3-5** Complete solution for the circuit in Fig. 4.3-4

The last two examples have demonstrated the following:

- An independent voltage source imposes a constraint on node voltage variables and reduces their number by one.
- A node voltage variable
*need not be*assigned at a node if an independent voltage source determines that node voltage directly or indirectly through another node voltage variable assigned to another node. - Node equation at a node where the node voltage is fixed directly by an independent voltage source connected from that node to the reference node
*is not required for solving other node voltage variables.* - Node equations at two nodes with an independent voltage source between them have to be added to get a combined node equation that will be useful in solving the circuit analysis problem.
- The nodal analysis formulation results in an equation
**YV***=*where**CU**is the nodal conductance matrix of a reduced order circuit resulting from deactivating all independent sources in it. The input vector**Y****U**can be written as*V***Y**^{–1}**CU**.*i.e., x = a*_{l}*I*_{l}*+ a*_{2}*1*_{2}*+...*+*b*_{1}*V*_{1}*+ b*_{2}*V*_{2}*+...*where*x*is some node voltage variable or element current/voltage variable and*a*’s and*b*’s are coefficients decided by circuit conductances and connection details. Some of the*a*’s and*b*’s may turn out to be zero for certain choices of*x*. For instance*a*_{3}is zero if*x*=*v*_{1}in the example we just concluded, but it is non-zero if*x*=*i*_{v1}. - The current through independent voltage sources can be found out only after the node voltage variables are solved. Finding the current through an independent voltage source requires the application of KCL at one of the end nodes of that voltage source.

We know an* n* node circuit has only* n –* 1 node voltage variables. Each independent voltage source reduces the number of node voltage variables to be solved for by one. Then, what happens if there are* n –* 1 independent voltage sources in the circuit? This leads us to our next example. Consider the following example circuit in Fig. 4.3-6 that has all the three node voltage variables constrained by three independent voltage sources.

**Fig. 4.3-6** A fully constrained nodal analysis example circuit

Although all the three nodes are identified in the diagram, no node voltage variable is assigned to them. This is so since the voltage source *V*_{1} fixes the first node potential, the voltage source *V*_{2} fixes the second node potential and sources* V*_{2} and* V*_{3} together fix the third node potential. Hence, the circuit solution is *v*_{1} = 2V, *v*_{2} = 1V and *v*_{3} = 3V. Now, all resistor voltages/currents and voltage across current sources can be worked out by inspection. Further,* i _{v}*

_{1},

*i*

_{v}_{2}and

*i*

_{v3}can be found out by applying KCL at the three nodes.

**Fig. 4.3-7** Solution for circuit shown in Fig. 4.3-6

KCL at Node–1 → *G*_{1}*v*_{1}* + G*_{2}(*v*_{1}* – v*_{2})* +** G*_{3}(*v*_{1} – *v*_{3}) +* i*_{V1} =* I*_{1}. Substituting numerical values and solving for* i _{V}*

_{1}

*,*we get

*i*

_{v}_{1}

*=*3A. Further,

We eliminate *i _{V}*

_{3}by adding these two equations to get

*G*

_{4}

*v*

_{2}

*+ G*

_{2}(

*v*

_{2}

*–*

*v*

_{1}) +

*G*

_{6}

*v*

_{3}

*+*

*G*

_{3}(

*v*

_{3}–

*v*

_{1}) +

*i*

_{V}_{2}

*=*0. Substituting numerical values and solving for

*i*

_{v}_{2 }, we get

*i*

_{V}_{2}= –17A. Substituting this value in the node equation at node-2, we solve for

*i*

_{V}_{3}to get

*i*

_{V}_{3}

*=*–21A. The complete circuit solution is shown in Fig. 4.3-7.

This circuit had no free node voltage variable. The three independent voltage sources suitably connected had fixed the node voltage variables already. Thus, there was no circuit analysis problem to begin with.

Three independent voltage sources in a four-node circuit need not result in a fully constrained circuit necessarily. For instance, assume that the source *V*_{3} is shifted and connected between node-1 and node-2. We note that the three independent voltage sources will then form a closed loop in which KVL equation will lead to an inconsistent equation –2 – 2 + 1 = 0. Practically, this means that all the three sources are being shorted together with large currents in them. However, if we insist on modelling the sources as independent ones, the circuit can have no solution when the KVL equation in a loop leads to inconsistent equation. Thus, the value of *V*_{3} has to be changed to –1 V if it has to be connected between node-1 and node-2. KVL will be satisfied then. Now, the node voltage variable at node-3 is not constrained by these three sources and hence will have to be obtained by nodal analysis. However, the reader may verify that there is no way to determine the currents in the three voltage sources uniquely! There are infinite possible sets of values for these three currents. Thus, the circuit cannot be solved uniquely. Similar conclusions will follow for a case with more than (*n* – 1) independent voltage sources in an* n* node circuit – either the circuit cannot be solved due to inconsistencies in KVL equations or the circuit can not be solved uniquely.

Thus, the maximum number of independent voltage source that can be there in a* n*-node circuit with unique solution is (*n* – 1).

##### 4.4 SOURCE TRANSFORMATION THEOREM AND ITS USE IN NODAL ANALYSIS

We take up the case where an independent voltage source is connected in series with a resistor. This case can indeed be solved by the procedure developed in the last section. However, there is a better way. We need the* Source Transformation Theorem* to understand this better method.

#### 4.4.1 Source Transformation Theorem

It was pointed out in Chapter 1 that practical voltage sources can often be modelled as ideal independent voltage source in series with a resistance. Similarly, practical current sources can be modelled by an ideal independent current source in parallel with a resistance. Consider a pair of such practical sources delivering power to identical load resistors as shown in the circuits in Fig. 4.4-1(a) and (b). *v*(*t*) is the voltage appearing across the load resistor and *i*(*t*) is the current through it in both cases.

**Fig. 4.4-1** Practical voltage and current sources supplying power to identical load resistors

Applying Ohm’s law and KVL, we get* v*(*t*) =* v _{s}*(

*t*) –

*R*(

_{sv}i*t*) in the circuit in Fig. 4.4-1(a) and applying current division principle and Ohm’s law we get

in the circuit in Fig. 4.4-1 (b). What are the conditions such that the voltage developed across the load resistor is the same in both cases?

The required conditions are (i)* R _{sv} = R_{si} = R_{s}* and (ii)

*v*(

_{s}*t*) =

*R*

_{s}*i*(

_{s}*t*). The sources are indistinguishable from their terminal behaviour if these two conditions are satisfied. That is, if the source is put inside a black box and an effort is made to determine whether it is a voltage source or a current source by measuring

*v*(

*t*) and/or

*i*(

*t*) for various values of

*R*such an attempt will fail. The two sources in Fig. 4.4-1 are completely equivalent as far as their effect on external element is concerned and one may replace the other provided they satisfy the two conditions listed above. Note that the equivalence is only with respect to what happens to the external element. They are

_{L},*not equivalent*as far as what happens inside the source is concerned. For instance, the power dissipation in

*R*is not the same in the two sources for the same value of

_{S}*R*

_{L}.

Source Transformation Theorem states that a voltage source with source function *v _{S}*(

*t*) in series with a resistance

*R*can be replaced by a current source with source function

_{S}*i*(

_{S}*t*)

*= v*(

_{S}*t*) /

*R*in parallel with a resistance

_{S}*R*without affecting any voltage/current/power variable external to the source. The direction of current source is such that current flows out of the terminal at which the positive of the voltage source is presently connected.

_{S}Similarly, a current source with source function *i _{S}*(

*t*) in parallel with a resistance

*R*can be replaced by a voltage source with source function

_{S }*v*

_{S}(

*t*) =

*R*

_{S}*i*

_{S}(

*t*) in series with a resistance

*R*without affecting any voltage/current/power variable external to the source. The polarity of voltage source is such that it tends to establish a current in the external circuit in the same direction as in the case when the current source is acting.

_{S}The reasoning employed in arriving at this theorem is equally valid in the case of dependent sources too. Hence, Source Transformation Theorem is applicable to dependent sources also.

Fig. 4.4-2 states the Source Transformation Theorem graphically.

#### 4.4.2 Applying Source Transformation in Nodal Analysis of Circuits

The application of this theorem in nodal analysis of circuits containing independent voltage sources is illustrated now. Consider the circuit (a) in Fig. 4.4-3. The circuit has five nodes including the reference node. All the nodes are identified. We observe that the voltage source* V*_{3} is in series with resistor *R*_{6}. This combination may be replaced by a current source*I*_{2} = *V*_{3}/ *R*_{6} in parallel with *R*_{6} as shown in (b) of Fig. 4.4-3. This results in elimination of node-4. The circuit in (b) is a 4-node circuit with two independent voltage sources (*V*_{1} and *V*_{2}) constraining its node voltage variables. Thus, there is only one node voltage variable.

**Fig. 4.4-2** Source equivalence between voltage and current sources

We start assigning node voltage variables from the leftmost node. The first node in circuit (b) is unconstrained and therefore we assign the node voltage variable* v*_{1} to that node. That fixes the node voltage at node-3 as *v*_{1} + *V*_{2}. Hence, a new node voltage variable is not needed at node-3. Node-2 potential is directly constrained by the source* V*_{1} and hence a node voltage variable is not needed there.

**Fig. 4.4-3** (a) Nodal analysis example circuit (b) Circuit after node reduction by source transformation

We need to write the node equations at node-1 and node-3 and combine them to get an equation in the single variable *v*_{1}. The node equation at node-2 is not needed for solving node potentials since it is a directly-constrained node.

Adding these two equations, we get,

We note that the* trivial element R*_{3} has no role in deciding the node voltages. Further, we note that the node equation has the format* YV = CI* where the

**-matrix is of 1 × 1 and is the nodal conductance matrix of the deactivated circuit. On deactivating the circuit in Fig. 4.4-3(a) by replacing voltage sources with short-circuits and current sources with open circuits, a simple circuit containing four resistors –**

*Y**R*

_{1},

*R*

_{2},

*R*

_{5}and

*R*

_{6}– will be the result.

Substituting the numerical values and solving for *v*_{1}, we get, 13_{v1} = 26 ⇒ * v*_{1}*=* 2V. Therefore *v*_{3} = 3V.

Now, we fit these values of node voltages into the circuit in Fig. 4.4-3(a) and obtain the voltage across the resistors and current sources and currents through resistors by inspection.

*i*_{v1}is obtained by applying KCL at node-2 of the original circuit.

*i _{V}*

_{2 }is obtained by applying KCL either at node-1 or at node-3 of the original circuit. Choosing node-1,

The current delivered by *V*_{3} is the same as the current in *R*_{6}. Hence, *i _{V}*

_{3}= –4A.

The complete solution is marked in Fig. 4.4-4.

**Fig. 4.4-4** Complete solution for circuit in Fig. 4.4-3(a)

##### 4.5 NODAL ANALYSIS OF CIRCUITS CONTAINING DEPENDENT CURRENT SOURCES

Dependent current sources do not pose any problem for nodal analysis. Independent current sources appear in the right-hand side of node equations. However, dependent current sources affect the coefficients of node voltage variables in the left-hand side of node equations.

The controlling variable of a linear dependent current source will be a voltage or current existing elsewhere in the circuit. However, any voltage or current variable in the circuit can be expressed in terms of node voltage variables. Hence, the dependent current source function can be expressed in terms of node voltage variables. Therefore, dependent current sources will affect the coefficients of node equation,* i.e.,* they will change the nodal conductance matrix. We will see that they* can* destroy the symmetry of the nodal conductance matrix.

We develop the nodal analysis procedure for this kind of circuits through two examples. The first example has node voltages that are not constrained by independent voltage sources and the second one has node voltage variables constrained by independent voltage source.

**Example: 4.5-1**

Solve the circuit in Fig. 4.5-1(a) completely.

**Fig. 4.5-1** (a) Circuit for Example 4.5-1 (b) Circuit after node reduction by source transformation

**Solution**

Step-1: Look for independent voltage sources in series with resistors and apply source transformation on such combinations.

There is one such combination in this circuit. It is* V*_{1} in series with *R*_{4}. Applying source transformation on this combination results in an independent current source of 17A in parallel with *R*_{4 }as shown in circuit (b) of Fig. 4.5-1.

Step-2: Assign node voltage variables at those nodes where the node voltage variable is not decided directly by an independent voltage source or indirectly by already assigned node voltage variables and independent voltage source functions.

Now, all the three non-reference nodes in circuit (b) are unconstrained nodes and hence we assign three node voltage variables* v*_{1,}* v*_{2} and *v*_{3} as shown in the figure.

Step-3: Identify the controlling variables of dependent current sources in terms of the node voltage variables assigned in the last step and rewrite the source functions of dependent sources in terms of node voltage variables.

*v*_{x} is the controlling variable in this circuit. However,* v _{x}* is the voltage across

*R*

_{2}and =

*v*

_{1}–

*v*

_{2}. Therefore, the current source function is

*k*(

*v*

_{1}

*–*

*v*

_{2}) with

*k*

*=*21.

Step-4: Prepare the node equations for the reduced circuit and solve them for node voltage variables.

The node equations are listed below.

Casting these equations in matrix form,

Eqn. 4.5-1 is in the form* YV = CI* where

*is the nodal conductance matrix. However, the nodal conductance matrix is now*

**Y***asymmetric*and cannot be written down easily by inspection. However, the equation confirms that all node voltages (and hence all element voltages and currents) can be expressed as a linear combination of independent source functions.

Substituting the numerical values,

Solving for the voltage vector by Cramer’s rule, *v*_{1} = 2V, *v*_{2} = 1V and* v*_{3} = 3V.

Step-5: Use these node voltage values in the original circuit to obtain element voltages and currents.

Now, the voltage across elements and current through them can be obtained by inspection. The complete solution is shown in Fig. 4.5-2.

**Fig. 4.5-2** Complete circuit solution in Example 4.5-1

**Example: 4.5-2**

Solve the circuit (a) in Fig. 4.5-3 completely.

**Fig. 4.5-3** (a) Circuit for Example 4.5-2 (B) Circuit after node reduction by source transformation

Step-1: Look for independent voltage sources in series with resistors and apply source transformation on such combinations.

There is one such combination in this circuit. It is* V*_{1} in series with *R*_{4}. Applying source transformation on this combination results in an independent current source of 4A in parallel with *R*_{4 }as shown in the circuit in Fig. 4.5-3(b).

Step-2: Assign node voltage variables at those nodes where the node voltage variable is not decided directly by an independent voltage source or indirectly by already assigned node voltage variables and independent voltage source functions.

We start at left-most node of the circuit in Fig. 4.5-3(b) and assign a node voltage variable *v*_{1} there since that node is not directly constrained by a voltage source. Moving to node-2, we see that the node voltage at that node cannot obtained from the already assigned variable *v*_{1} and that there is no direct constraint at that node. Hence, we assign a node voltage variable *v*_{2} at that node. Now, the node voltage at node-3 can be obtained as *v*_{1} + *V*_{2} and a node voltage variable is not needed at that node. Therefore, there are only two node voltage variables in this circuit.

Step-3: Identify the controlling variables of dependent current sources in terms of the node voltage variables assigned in the last step and rewrite the source functions of dependent sources in terms of node voltage variables.

*i _{x}* is the controlling variable in this circuit. However,

*i*

_{x}=*G*

_{5}[

*v*

_{2}– (

*v*

_{1}+

*V*

_{2})]. Therefore, the current source function is

*kG*

_{5}[

*v*

_{2}– (

*v*

_{1}+

*V*

_{2})]. with

*k*

*=*4.5.

Step-4: Prepare the node equations for the reduced circuit and solve them for node voltage variables. Ignore node equation at nodes where voltage sources are connected directly to reference node. Combine the node equations at the end nodes of voltage sources connected between two non-reference nodes.

The node equations are listed below.

Combining the node equations at node-1 and node-3 to eliminate *i*_{V2},

Casting these equations in matrix form,

This equation is in the form* YV = CU* where

*is the nodal conductance matrix. However, the nodal conductance matrix is now*

**Y***asymmetric*and cannot be written down easily by inspection. However, the equation confirms that all node voltages (and hence all element voltages and currents) can be expressed as a linear combination of independent source functions.

Substituting the numerical values,

Solving for the voltage vector by Cramer’s rule,* v*_{1}* =* 2V, *v*_{2} = 1V and* v*_{3} = *v*_{1}+* V _{2} =* 3V.

Step-5: Use these node voltage values in the original circuit to obtain element voltages and currents for resistors and current sources.

The voltage across resistive elements and current sources and currents through resistive elements can be obtained by inspection. The currents through independent voltage sources in series with resistors can also be obtained at this stage.

Step-6: Use appropriate node equations to solve for currents through the remaining independent voltage sources.

The current through the independent voltage source *V*_{2} has to be determined. We use the node equation at node-1 for this purpose.

The complete solution is marked in Fig. 4.5-4.

**Fig. 4.5-4** Complete solution for circuit in Example 4.5-2

##### 4.6 NODAL ANALYSIS OF CIRCUITS CONTAINING DEPENDENT VOLTAGE SOURCES

A dependent voltage source can appear in three positions in a circuit. It may appear from a node to the reference node. Secondly, it may appear between two nodes at which more than two elements are incident. Thirdly, it may appear in series with some resistor. The following example shows a circuit that has a dependent voltage source in series with a resistor.

**Example: 4.6-1**

Solve the circuit in Fig. 4.6-1(a).

**Fig. 4.6-1** (a) Circuit for Example 4.6-1 (b) Reduced circuit after source transformation

Step-1: Look for independent voltage sources and dependent voltage sources in series with resistors and apply source transformation on such combinations.

There is one such combination in this circuit. It is –0.9*i _{x}* in series with

*R*

_{1}. Applying source transformation on this combination results in a dependent current source of –0.9 G

_{1}

*i*A in parallel with

_{x}*R*

_{1}as shown in the circuit in Fig. 4.6-1(b).

Step-2: Assign node voltage variables at those nodes where the node voltage variable is not decided directly by a voltage source or indirectly by already assigned node voltage variables and voltage source functions.

We start at left-most node of the circuit in Fig. 4.6-1(b) and assign a node voltage variable *v*_{1} there since that node is not directly constrained by a voltage source. Moving to node-2, we see that the node voltage at that node cannot obtained from the already assigned variable* v*_{1} and that there is no direct constraint at that node. Hence, we assign a node voltage variable* v*_{2} at that node. The node voltage at node-3 cannot be obtained from *v*_{1} and *v*_{2}. Hence, we assign a node voltage variable *v*_{3} at that node. Therefore, there are three node voltage variables in this circuit.

Step-3: Identify the controlling variables of dependent current sources in terms of the node voltage variables assigned in the last step and rewrite the source functions of dependent sources in terms of node voltage variables.

*i _{x}* is the controlling variable for the dependent current source at node-1 in the circuit (b) of Fig. 4.6-1. However,

*i*

_{x}= G_{3}[

*v*

_{1}–

*v*

_{3}]. Therefore, the current source function is

*k*

_{1}

*G*

_{1}

*G*

_{3}[

*v*

_{1}–

*v*

_{3}] with

*k*

_{1}

*=*–0.9.

*v _{y}* is the controlling variable for the dependent current source at node-3. However,

*v*

_{y}=*v*

_{2}. Therefore, the current source function at node-3 is

*k*

_{2}

*v*

_{2}with

*k*

_{2}= 21.

Step-4: Prepare the node equations for the reduced circuit and solve them for node voltage variables. Ignore node equation at nodes where voltage sources are connected directly to reference node. Combine the node equations at the end nodes of voltage sources connected between two non-reference nodes.

The node equations are listed below.

Substituting the numerical values and casting these equations in matrix form,

This equation is in the form* YV = CU* where

*is the nodal conductance matrix. However, the nodal conductance matrix is now*

**Y***asymmetric*and cannot be written down easily by inspection. However, the equation confirms that all node voltages (and hence all element voltages and currents) can be expressed as a linear combination of independent source functions.

Solving for the voltage vector by Cramer’s rule, *v*_{1} = 2V, *v*_{2} = 1V and *v*_{3} = 3V.

Step-5: Use these node voltage values in the original circuit to obtain element voltages and currents for resistors and current sources.

The voltage across resistive elements and current sources and currents through resistive elements can be obtained by inspection. The currents through independent voltage sources in series with resistors can also be obtained at this stage.

The complete solution is marked in Fig. 4.6-2.

**Fig. 4.6-2** Complete solution for circuit in Fig. 4.6-1 (a)

**Example: 4.6-2**

Solve the circuit in Fig. 4.6-2 (a) in Example 4.6–2 by nodal analysis.

**Fig. 4.6-3** (a) Circuit for Example 4.6-2 (b) Circuit after node reduction by source transformation

**Solution**

Step-1: Look for independent voltage sources and dependent voltage sources in series with resistors and apply source transformation on such combinations.

There are two such combinations in this circuit. They are *V*_{1} in series with* R*_{1} and *V*_{2} in series with* R*_{6}. Applying source transformation on these combinations results in circuit (b) of Fig. 4.6-3.

Step-2: Assign node voltage variables at those nodes where the node voltage variable is not decided directly by a voltage source or indirectly by already assigned node voltage variables and voltage source functions.

We start at left-most node of the circuit (b) and assign a node voltage variable* v*_{1} there since that node is not directly constrained by a voltage source to reference node. Moving to node-2, we see that the node voltage at that node can be obtained from the already assigned variable* v*_{1} by adding *v _{x}* . Hence, we do not assign a node voltage variable at that node. The node voltage at node-3 cannot be obtained from

*v*

_{1}and there is no constraining voltage source connected from that node to reference node. Hence, we assign a node voltage variable

*v*

_{3}at that node. Therefore, there are only two node voltage variables in this circuit.

Step-3: Identify the controlling variables of dependent sources in terms of the node voltage variables assigned in the last step and rewrite the source functions of dependent sources in terms of node voltage variables.

*v _{x}* is the controlling variable for the dependent voltage source between node-1 and node-2 in the circuit (b) of Fig. 4.6-1. However,

*v*

_{x}=*v*

_{3}–

*v*

_{1}. Therefore, the voltage source function is

*k*(

*v*–

_{3}*v*

_{1}) with

*k*= 1.

Step-4: Prepare the node equations for the reduced circuit and solve them for node voltage variables. Ignore node equation at nodes where voltage sources are connected directly to reference node. Combine the node equations at the end nodes of voltage sources connected between two non-reference nodes.

The node equations are listed below.

We eliminate the current through the dependent voltage source from the equations by adding the first two equations.

Substituting the numerical values and casting these equations in matrix form,

Solving for the voltage vector by Cramer’s rule, *v*_{1} = 2V, *v*_{3} = 3V. Then,* v _{x} =* 1V and therefore

*v*

_{2}=

*v*

_{1}–

*v*

_{x}_{ }= 1V.

Step-5: Use these node voltage values in the original circuit to obtain element voltages and currents for resistors and current sources.

The voltage across resistive elements and current sources and currents through resistive elements can be obtained by inspection. The currents through voltage sources in series with resistors can also be obtained at this stage.

Step-6: Use appropriate node equations to solve for currents through the remaining voltage sources.

We have to find the current through the dependent voltage source by employing KCL equation at node-1 or node-2. Choosing node-2,

1 + 1(1 – 2) + 2(1 – 3) =* i _{vx}* ⇒

*i*–4 A. The complete solution is marked in Fig. 4.6-4.

_{vx}=**Fig. 4.6-4** Complete solution for circuit in Fig. 4.6-3(a)

**Example: 4.6-3**

Solve the circuit in Fig. 4.6-5 by nodal analysis.

**Fig. 4.6-5** Circuit for nodal analysis in Example 4.6-3

**Solution**

Node-1 is constrained by the dependent source to reference node and hence no node voltage variable can be assigned there. Node-2 is assigned a node voltage variable *v*_{2}. Then, the node voltage variable at node-3 gets fixed as *v*_{2} + 2*i _{x}* through the dependent voltage source connected between node-2 and node-3. Thus, this circuit has only one node voltage variable to be solved for.

Node equation at node-1 is not needed for determining node voltages. However, it will be needed later for determining the current through the dependent voltage source connected at that node.

*v*=

_{x }*v*

_{2 }+ 2

*i*–2

_{x}*v*and

_{x}*i*= 2

_{x}*v*–

_{x}*v*

_{2}

Solving these two equations, we get* v _{x}* =

*v*

_{2}and

*i*=

_{x}*v*

_{2}.

The KCL equations at node-2 and node-3 can be combined to form a single equation in* v*_{2}*. *

This combined equation will be *v*_{2} + (*v*_{2} –2*v _{x}* ) + 5(

*v*

_{2}+ 2

*i*) + 2(

_{x}*v*

_{2}+ 2

*i*– 2

_{x}*v*) = 17. Substituting for

_{x}*v*and

_{x}*i*in terms of

_{x}*v*

_{2}, we get, 17

*v*

_{2}= 17 ⇒

*v*

_{2}= 1V.

Now,* v _{x}* =

*v*

_{2}= 1V and

*i*= 1A. Therefore, the node voltages are 2V, 1V and 3V respectively at node-1, node-2 and node-3. Then, the node equation at node-1 can be employed to find current into the positive terminal of dependent source as –9 A. Node equation at node-3 is used to determine the current into the positive terminal of second dependent source as –21A. The complete solution is marked in Fig. 4.6-6.

_{x}**Fig. 4.6-6** Solution for circuit in Example 4.6-3

##### 4.7 MESH ANALYSIS OF CIRCUITS WITH RESISTORS AND INDEPENDENT VOLTAGE SOURCES

Mesh Analysis uses the KCL equations and element equations to eliminate variables, reduces the number of pertinent variables to (*b – n +* 1) mesh current variables and uses the second set of equations (KVL equations) to solve for these variables.

Mesh analysis is applicable only to* planar networks.* A planar network is one that can be drawn on a plane without any component crossing over another component. Consider the two circuits shown in Fig. 4.7-1.

**Fig. 4.7-1** (a) A non-planar circuit (b) A planar circuit that appears to be non-planar

The circuit in Fig. 4.7-1(a) is non-planar since it cannot be drawn on a plane surface without crossovers. The circuit (b) is planar though there appears to be a crossover the way it is drawn in Fig. 4.7-1. However, it can be redrawn to avoid the crossover.

#### 4.7.1 Principle of Mesh Analysis

A circuit with* n* nodes,* b* elements and* l* loops will have* n* KCL equations,* l* KVL equations and *b* element equations involving 2*b* element variables. Only (*n* – 1) KCL equations out of* n* will be linearly independent. Only (*b – n +* 1) KVL equations out of* l* such equations will be linearly independent. Any set of KCL equations written at (*n* – 1) nodes of the circuit will form a linearly independent set. However, any set of (*b* –* n* + 1) equations drawn from the set of* l* voltage equations need not form a linearly independent set.

In Node Analysis, KVL equations are used to show that all element voltages can be expressed in terms of (*n* – 1) node voltages. KCL equations along with element relations are used subsequently to set up (*n* – 1) node equations needed for determining the node voltages.

Analogously, we try to use the KCL equations to show that all element currents can be expressed in terms of a reduced set of (*b* –* n +* 1) specially defined currents called* mesh currents.* Subsequently, we set up (*b* –* n +* 1) KVL equations involving these currents to determine them.

Which (*b* –* n +* 1) loops do we choose for writing these KVL equations? The loops have to be chosen in such a way that the KVL equations will form an independent set. Two equations are necessarily independent if both equations contain terms that belong to only one of them. Consider the following equations.

*v*

_{1}

*– v*

_{2}

*+ v*

_{3}

*–*2 = 0 and –

*v*

_{1}

*+ v*

_{2}

*+ v*

_{4}

*–*7 = 0

Obviously, no combinations like* a *(*v*_{1}*– v*_{2}* +** v*_{3} – 2) +* b* (–*v*_{1}*+ v*_{2}* + v*_{4}* –* 7)can become equal to zero for all time for any combination of values for* a* and* b* for the simple reason that *v*_{3} and *v*_{4} cannot be got rid of. *v*_{3} is present in only one equation and *v*_{4} too is present only in one equation.

*Thus, a sufficient but not necessary condition for a set of linear equations to form an independent set is that each equation should have at least one variable that does not appear in any other equation in the set.*

Refer to the circuit in Fig. 4.7-2 .

**Fig. 4.7-2** Circuit for illustrating mesh analysis

The KVL equations for the three* windows* designated by* M*_{1}*, M*_{2} and *M*_{3} in this circuit are given below.

These equations form an independent set of (*b* –* n +* 1) = (9 – 7 + 1) = 3 KVL equations for the circuit. They are independent since each equation contains at least one element voltage variable that is not contained in the other two. This is so since the element *R*_{1} is* completely owned* by first window, the element* R*_{3} is* completely owned* by second window and the element* R*_{5} is* completely owned* by third window. If an element is not* shared* among many windows and is* completely owned* by a particular window, its voltage variable will appear only in the KVL equation of that particular window. However, that KVL equation cannot be generated by linearly combining KVL equations for other windows.

Thus, the KVL equations for the windows of a circuit will be the required set of independent equations provided each window contains at least one element that is totally owned by it. The windows in a planar circuit are called* Meshes.* It is possible to prove that in a planar connected network containing* b* elements and* n* nodes there will be exactly (*b* –* n +* 1) meshes.

However, is it not possible for a mesh to have no element that is completely owned by it? It is possible. See Fig. 4.7-3. The mesh *M*_{2} does not own any element. However, the four mesh KVL equations will be independent in this case too. This is so since no linear combination of three equations for the other three meshes can get rid of *v*_{R6} or* V*_{1} or *V*_{4}.

**Fig. 4.7-3** Circuit with a mesh that does not own any element

Hence, we accept the fact that KVL equations for (*b* –* n* + 1) meshes in a planar circuit will form a linearly independent set of equations without further discussion.

Let us take up the issue of defining (*b* –* n +* 1) special currents that can be used to express all the element currents in the circuit. We can think of categorising all the elements that participate in a mesh into two groups – the first group contains those elements which appear only in that mesh and the second group contains those elements shared by this mesh with other meshes. Obviously, same current flows through all the elements belonging to first group. They are in series combination. Thus, each mesh will have a clearly identifiable current that flows in all the elements completely owned by that mesh. This current,* with clockwise direction assumed,* is defined as* mesh current* for that mesh and is used as the describing variable in Mesh Analysis just as* node voltage* was used as the describing variable in Nodal Analysis.

Refer to Fig. 4.7-2. We can derive the following equations by applying KCL at various nodes in this circuit.

Thus, all the remaining currents can be expressed in terms of three currents – *i*_{R1} , *i*_{R3} and *i*_{R}_{5}. These three currents will be the mesh currents in this circuit.

However, a separate symbolic representation of mesh current is used in circuit analysis in order to emphasize the clockwise direction of flow in the definition of mesh current and to highlight the point that mesh current is a current that is common to all elements in the mesh. This is shown in Fig. 4.7-4.

**Fig. 4.7-4** Circuit for mesh analysis

The clockwise arrow and the symbol nearby in every mesh stand for the mesh current variable. Mesh current magnitude itself gives the magnitude of current in all the elements owned by that mesh. If the assumed current direction in such an element coincides with that of mesh current, element current is same as mesh current. If the assumed current direction in such an element is opposite to that of mesh current, element current is same as negative of mesh current. If an element is shared by two meshes, its current is given by the difference between the two mesh currents with due attention to be placed on current directions.

The procedure of Mesh Analysis is now illustrated using the circuit in Fig. 4.7-4 as an example. Three mesh currents *i*_{1}, *i*_{2} and *i*_{3} are assigned in the three meshes in clockwise direction as shown. The KVL equations for the three meshes are written now with element equations employed to convert the voltage variables into mesh current variables. We follow a convention in writing these KVL equations. We start at the leftmost corner of the mesh and traverse the mesh in clockwise direction. We enter the voltages we meet with in a sum. A voltage is entered in the sum with the same polarity as its first polarity marking that we meet during our traversal- if we meet its positive polarity first we enter it with positive sign and if we meet its negative polarity first we enter it with negative sign.

The mesh equation for first mesh is derived below.

The first voltage that we meet is that of *V*_{1}. We meet its negative polarity first. Therefore, –*V*_{1} gets into the equation. Then, we see the voltage across *R*_{1} with positive polarity first. The current through it is same as the mesh current* i*_{1} and hence *R*_{1}*i*_{1} enters the equation. The next voltage we meet with is that of *R*_{2} with its negative polarity first. The current through *R*_{2} is *i*_{2} – *i*_{1} in the direction assumed for it in the diagram. Hence, –*R*_{2}(*i*_{2}* –i*_{1}) enters the equation. The last voltage we meet with in first mesh is that of *V*_{2}, positive polarity coming first. Hence, +*V*_{2} enters the equation. Thus, the mesh equation for the first mesh is

With our convention of traversing a mesh in clockwise direction, the mesh current variable in the mesh where KVL is being applied will appear with positive sign and other mesh current variables will appear with negative sign in the equation. And the* net rise in voltage contributed by all the* *independent voltage sources* in that mesh will appear with* positive sign on the right side* of equation. The remaining two mesh equations for this circuit are

We can solve for* i*_{1}*, i*_{2} and* i*_{3} using the three equations listed below.

We followed a certain convention in writing these mesh equations in Eqn. 4.2-2. Adhering to such a convention has resulted in certain symmetry in these equations. Let us express these equations in matrix notation to see the symmetry clearly.

*i.e., ZI = DU*

where* Z* is called the

*Mesh Resistance Matrix,*is called the

**I***Mesh Current Vector,*is called the

**U***Input Vector*and

*is called the*

**D***Input Matrix.*

Note that the order of Mesh Resistance Matrix is (*b – n +* 1) × (*b* –* n +* 1) and that it is* symmetric. *The diagonal element of * Z*-matrix ,

*z*, is the

_{ii}*sum of resistances appearing in the mesh-i.*The off-diagonal element of

*-matrix ,*

**Z***z*, is the

_{ij}*negative of sum of all resistances appearing in common between mesh-i and mesh-j.*There can be more than one resistance shared between two meshes. Then, they will be in series and they will add in

*z*. That is why

_{ij}*z*should be the negative of

_{ij}*sum*of all resistances shared by mesh

*-i*and mesh

*-j.*The right-hand side product

*is a column vector of*

**DU***net voltage rise imparted in the mesh by the independent voltage sources in the corresponding meshes.*

Now, we can write down this matrix equation by inspection after skipping all the intermediate steps. The following matrix equation results in the case of the example we considered in this section.

Solving the matrix equation by Cramer’s rule, we get, *i*_{1} = 1 A, *i*_{2} = 2 A and *i*_{3} = 3 A. The element currents can be obtained by applying KCL at various nodes in the circuit. This can be done by inspection. Resistor voltages may then be obtained by applying Ohm’s law. The complete solution of the circuit is shown in Fig. 4.7-5.

**Fig. 4.7-5** Complete mesh analysis solution for the circuit in Fig. 4.7-4

This section has shown that an* n*-node,* b*-element circuit containing only linear resistors and independent voltage sources will have a Mesh representation given by* ZI = DU* where

*is the Mesh Resistance Matrix of order (*

**Z***b*–

*n +*1) × (

*b*–

*n +*1),

*is the mesh current column vector of order (*

**I***b*–

*n +*1) × 1,

*is the source voltage column vector of order*

**U***n*1 and

_{vs}×*is the input matrix of order (*

**D***b*–

*n +*1) ×

*n*

_{vs}.*n*is the number of independent voltage sources in the circuit.

_{vs}Equivalently, the matrix product* DU* may be replaced by a column vector that contains the

*net voltage rise contributed to a mesh by all voltage sources participating in that mesh.*The Mesh Resistance Matrix will be symmetric for this kind of circuits. The mesh current vector is obtained by Cramer’s rule or by Matrix inversion as

**I***=*

**Z**.^{–1}DU#### 4.7.2 Is Mesh Current Measurable?

Mesh current of a mesh in a planar circuit is related to the current that flows in the series combination of all those elements that participate only in that mesh* if such elements are present in that mesh.* In such cases, a mesh current is indeed a physical quantity and it can be measured. One can always introduce an ammeter in series with an element that appears only in the concerned mesh and measure the mesh current flowing in that mesh.

However, what if there is no wholly owned element in a particular mesh? For instance, consider the mesh marked as* M _{k}* in part of a large circuit, shown in Fig. 4.7-6.

This mesh in circuit Fig. 4.7-6(a) has no element wholly owned by it. The mesh current* i _{k}* assigned to this mesh cannot be identified as the current flowing through any of the circuit elements appearing in the mesh. However, let us try to create a

*wholly owned*element in this mesh without affecting the circuit solution in any manner. Assume that

*R*

_{2}is a member of only one mesh. Then, nothing prevents us from changing our viewpoint to that expressed by the circuit in Fig. 4.7-6(b). Here, we have introduced an additional node at the junction between

*R*

_{2}and

*R*

_{1}and introduced a short-circuit element in between the new node and the old one. Introduction of a shorting link causes no change in the circuit variables anywhere in the circuit. However, now we identify this newly introduced short-circuit element as the element

*exclusively owned*by mesh

*M*and identify the mesh current variable

_{k}*i*as the current that flows in this element. We can introduce an ammeter there as shown in Fig. 4.7-6(b) and measure

_{k}*i*

_{k}.**Fig. 4.7-6** Circuit pertaining to measurability of mesh currents

However, even this technique will fail to make the mesh current variable* i _{k}* measurable if

*R*

_{2}is a member of yet another mesh. If the entire periphery of the mesh

*M*is shared by some mesh or other, then, a short-circuit element introduced anywhere in the periphery will be shared by some other mesh.

_{k}Thus, we conclude that there can be meshes in which mesh current cannot be identified as the current flowing in any element in that mesh. Therefore, in general, mesh current is a ‘fictitious current’ that is not measurable directly. It is a ‘fictitious current’ that can be thought of as ‘flowing around the periphery of the mesh’. Element currents are measurable. Each element current is a combination of two ‘peripheral currents’ or mesh currents. However, these peripheral currents are not always measurable.

However, the KVL equations written for meshes in a planar circuit will form a set of (*b* –* n* + 1) independent equations quite independent of whether the mesh currents are measurable or not.

##### 4.8 MESH ANALYSIS OF CIRCUITS WITH INDEPENDENT CURRENT SOURCES

An independent current source that appears in parallel with a resistor can be converted into an independent voltage source in series with a resistor by applying source transformation theorem. This measure will reduce the number of meshes in the circuit by one and increase the number of nodes in the circuit by one. Such current sources in a circuit do not pose any special problem for mesh analysis procedure.

An independent current source may also appear in series with another element. Such a current source cannot be converted into an equivalent voltage source. This kind of current source will impose constraints on the mesh current variables in the circuit.

If an independent current source that cannot be equivalenced to a voltage source participates in only one mesh, then, that mesh current is* fixed* by that current source function. That is, that mesh current is no more a variable. Thus, the degree of freedom of the circuit decreases by one and number of mesh current variables to be determined comes down by one. Moreover, one does not need the mesh equation for that mesh to solve for the remaining mesh current variables. However, that mesh equation will have to be used for finding out the voltage across the current source after all the other mesh current variables have been obtained.

If a current source that cannot be equivalenced to a voltage source is shared by two meshes in a circuit, it constrains the mesh currents in those two meshes to have a difference decided by the current source function. This constraint equation of the form* i _{i}* –

*i*

*(*

_{j}= i_{s}*t*)

*,*where

*i*(

_{S}*t*) is the value of current source, supplies one equation for finding out the two mesh currents. Hence, we will not need both the two mesh equations obtained by applying KVL in the two meshes. In fact, both of them will contain the voltage across the current source as a term and we will have to eliminate that voltage term by adding the two mesh equations to obtain a combined-mesh equation. Thus, for this kind of current source connection, we get one equation from the constraint imposed by the current source and a second one by adding the two mesh equations for the meshes. Finally, one of those two mesh equations will have to be used to determine the voltage across the current source after all mesh current variables have been solved for.

These aspects of Mesh Analysis are illustrated through a series of examples that follow.

**Example: 4.8-1**

Apply mesh analysis procedure on the circuit in Fig. 4.8-1 (a).

**Fig. 4.8-1** (a) Circuit for (b) Circuit after mesh reduction by source transformation

**Solution**

All the circuit variables are identified following passive sign convention. The labelling of variables will be* v* or* i* with the name of element as subscript.

Step-1: If there are current sources that appear directly across resistors convert them into equivalent voltage sources in series with resistors. This is called ‘mesh reduction’.

There is one such combination in circuit of Fig. 4.8-1 (a). It is* I*_{1} (2.5 A) in parallel with *R*_{1} (2Ω). We replace these with a voltage source of value* R*_{1}*I*_{1} (5 V) in series with *R*_{1} (2Ω) with positive polarity at top as shown in circuit of Fig. 4.8-1 (b).

The second current source* I*_{2} in circuit (a) cannot be reduced this way.

Step-2: Assign mesh current variables in the reduced circuit starting with leftmost mesh. Assign a mesh current variable to a mesh only if its mesh current is not constrained directly by a current source and its mesh current is not decided by other mesh current variables already assigned along with current source functions.

There are three meshes in the reduced circuit. The first mesh has no current source directly constraining its mesh current. No other mesh was assigned mesh current variable and hence this mesh current cannot get decided by other already assigned mesh current variables. Therefore, we assign a mesh current variable to this mesh and call it* i*_{1}*.*

Moving to the second mesh we observe that the independent current source* I*_{2} directly constrains its mesh current to be* I*_{2} A (2 A). Therefore, we do not assign any mesh current variable to this mesh.

There is no current source in the third mesh. Its mesh current cannot be obtained from the already assigned mesh current variables. Therefore, we assign a mesh current variable to this mesh and call it* i*_{3}.

Thus, this circuit has two mesh current variables –* i*_{1} and* i*_{3} – to be solved for.

Step-3: Prepare the mesh equations by applying KVL in meshes, starting at left bottom corner and traversing the mesh in clockwise direction. Ignore the meshes that are directly constrained by current sources. Further, if two meshes share a current source, then, add the mesh equations for those two meshes to generate a new equation that will be used in solution process. The number of equations at the end of this step will be equal to number of meshes – number of irreducible independent current sources.

The two mesh equations are:

These mesh equations are expressed in matrix form below.

Step-4: Solve the mesh equations by Cramer’s rule or by matrix inversion.

Substituting numerical values and simplifying,

Solving for* i*_{1} and *i*_{3} by Cramer’s rule, *i*_{1} = 1A and *i*_{3} = 3A. *i*_{2} is already known to be 2A.

Step-5: Use the mesh current values and apply KCL at various nodes in the original circuit to obtain element currents and voltages for all resistive elements and current through voltage sources.

Refer to circuits in Fig. 4.8-1. The resistor currents and voltages as per direction and polarity marked in Fig. 4.8-1 is calculated below.

Current through *R*_{1} *=I*_{1}* – i*_{1} = 1.5A, ∴ Voltage across *R*_{1} = 3V

Current through *R*_{2} = *i*_{2} – *i*_{1} = 1A, ∴Voltage across *R*_{2} = 3V

Current through *R*_{3} = *I*_{2} = 2A, ∴ Voltage across *R*_{3} = 2V

Current through *R*_{4} = *i*_{3} – *I*_{2} = 1A, ∴ Voltage across *R*_{4} = 1V

Current through *R*_{5} = *i*_{3} = 3A, ∴ Voltage across *R*_{5} = 12V

Now, the currents through the voltage sources are

Current through* V*_{1} = –1A, current through *V*_{2} = –1A and current through* V*_{3} = 3A

Step-6: Use the element voltages calculated in the above step and apply KVL in various meshes in the original circuit to obtain element voltages for all current sources.

Applying KVL in the mesh formed by first current source and the resistor* R*_{1} in the original circuit, we get the voltage across* I*_{1} as –3V.

Applying KVL in the mesh in which the second current source appears, we get the voltage across the current source *I*_{2} as –1V.

Note that these voltages follow passive sign convention.

The complete circuit solution is shown in Fig. 4.8-2.

**Fig. 4.8-2** Complete mesh analysis solution for circuit in Fig. 4.8-1(a)

**Example: 4.8-2**

Find the total power dissipated in the circuit and power delivered by each source in Fig. 4.8-3.

**Fig. 4.8-3** Circuit for Example 4.8-2

**Solution**

There is no current source that can be transformed into a voltage source in this circuit. However, the current source* I*_{1} directly constrains the second mesh current to be 2A. The third mesh current gets constrained to be* I*_{1} +* I*_{2} = 3A. Therefore, there is no need to assign mesh current variables in second and third meshes. The mesh current variable* i*_{1} is assigned to first mesh as shown in Fig. 4.8-3.

The mesh equation for the first mesh is 5*i*_{1} = 4V + 3Ω × 2A – 5V = 5V ×* i*_{1} = 1A. The complete solution is shown in Fig. 4.8-4.

**Fig. 4.8-4** Circuit solution for Example 4.8-2

We have followed passive sign convention throughout. Hence, the power dissipated in each resistor is the product of voltage across it and current through it. Total power dissipated in the circuit is found by adding up this product for all the resistors.

∴Total power dissipated in the circuit = 2V × 1A + 3V × 1A + 2V × 2A + 1V × 1A + 12V × 3A = 46 W

Power delivered by an element is equal to negative of power dissipated in it. Power dissipated in an element is the product of voltage and current as per passive sign convention. Hence, the power delivered by a source is negative of* vi* product with* v* and* i* marked according to passive sign convention.

∴ Power delivered by *V*_{1} = –(4V × –1A) = 4 W

Power delivered by *V*_{2} = –(5V × –1A) = 5 W

Power delivered by *V*_{3} = –(–11V × 3A) = 33 W

Power delivered by *I*_{1} = –(–1V × 2A) = 2 W

Power delivered by* I*_{2} = –(–2V × 1A) = 2 W

The total delivered power is equal to the total dissipated power.

The last two examples have demonstrated that:

- An independent current source imposes a constraint on mesh current variables and reduces their number by one.
- A mesh current variable
*need not be*assigned for a mesh if an independent current source determines that mesh current directly or indirectly through another mesh variable assigned to another mesh. - Mesh equation for a mesh in which the mesh current is fixed directly by an independent current source appearing only in that
*is not required for solving other mesh current variables.* - Mesh equations for two meshes that share an independent current source among them have to be
*added*to get a combined mesh equation that will be useful in solving the circuit analysis problem. - The mesh analysis formulation results in an equation
=**ZI****DU****Z****U****I****Z**.^{1}DU*i.e., x = a*_{l}*I*_{l}*+ a*_{2}*1*_{2}*+...*+*b*_{1}*V*_{1}*+ b*_{2}*V*_{2}+...where*x*is some mesh current variable or element current/voltage variable and*a*’s and*b*’s are coefficients decided by circuit resistances and connection details. Some of the*a*’s and*b*’s may turn out to be zero for certain choices of*x.* - The voltage across independent current sources can be found out only after the mesh current variables are solved. Finding the voltage across an independent current source requires the application of KVL in a mesh containing that current source.

We had observed that an* n*-node *b*-element circuit has only (*b* –* n* + 1) mesh current variables. Further, each independent current source reduces the number of mesh current variables to be solved for by one. Then, what happens if there are (*b* –* n* + 1) independent current sources in the circuit? Further, what if there are more than that many independent current sources? This leads us to our next example. Consider the following example circuit that has all the three mesh current variables constrained by three independent current sources.

**Example: 4.8-3**

Solve the circuit in Fig. 4.8-5 by Mesh Analysis.

**Fig. 4.8-5** Circuit for Example 4.8-3

**Solution**

The independent current source* I*_{2} constrains the second mesh current to be equal to 2 A. This results in first mesh current getting constrained by the equation *i*_{1} – *i*_{2} = –1A resulting in *i*_{1} = 1A. The independent current source* I*_{3} along with the current source* I*_{2} imposes a constraint on* i*_{3} resulting in *i*_{3} = 3A. Thus, all the three mesh current variables are constrained by the independent current sources. There is no mesh current variable to be determined.

If the sources in this circuit are deactivated, the resulting network will have* no closed loops.* This is yet another feature of a fully constrained circuit.

Elements other than the current sources have nothing to do with mesh currents in this circuit. They affect only the voltages that appear across the current sources. These voltages can be found by applying KVL in the meshes.

Applying KVL to the first mesh,

–2V + 2Ω × 1A – 3Ω ×(2A – 1A) – *v*_{1} = 0 ⇒ *v*_{1} = –3V

Applying KVL to the third mesh,

*v*_{1} + 1Ω × (3A – 2A)+4Ω×3A – 12V = 0 ⇒ *v*_{1} = –1V

Applying KVL to the second mesh,

*v*_{I1} + 3Ω × (2A – 1A) + *v*_{I2} + 1Ω ×2A – 1Ω × (3A –2A) – *v*_{I3} = 0 *v*_{I2} = –2V

The currents through resistors, voltages across them and currents through voltage sources can be found by inspection. The complete solution is marked in Fig. 4.8-6.

**Fig. 4.8-6** Complete solution for circuit in Example 4.8-3

Three independent current sources in a three-mesh circuit need not result in a fully constrained circuit necessarily. For instance, assume that the source *I*_{3} is shifted and connected in series with* R*_{1} in Fig. 4.8-5. We note that the three independent current sources will have to satisfy the condition that *I*_{3} + *I*_{1} – *I*_{2} = 0 due to KCL constraint at the node between *R*_{1} and *R*_{2}. This constraint is satisfied with the values used in the present example. However, the reader may verify that it will be impossible to determine the voltages that appear across the current sources in this case though the mesh currents can be determined. The circuit will have many solutions.

The constraint above need not be satisfied by any three arbitrary current sources. If they do not, then they are trying to violate KCL. That will imply that circuit has no solution. In practice, there will be a solution since each practical current source will have some finite resistance across it. But then, the circuit becomes a different one.

Similar conclusions will follow for a case with more than (*b* –* n* + 1) independent current sources in an* n*-node* b*-element circuit – either the circuit cannot be solved due to inconsistencies in KCL equations or the circuit cannot be solved uniquely.

Thus, the maximum number of independent current source that can be there in an *n*-node b-element circuit with unique solution is (*b – n* + 1).

##### 4.9 MESH ANALYSIS OF CIRCUITS CONTAINING DEPENDENT SOURCES

Dependent voltage sources do not pose any problem for mesh analysis. Independent voltage sources appear on the right-hand side of mesh equations. However, dependent voltage sources affect the coefficients of mesh current variables in the left-hand side of mesh equations.

The controlling variable of a linear dependent current source will be a voltage or current existing elsewhere in the circuit. But, any voltage or current variable in the circuit can be expressed in terms of mesh current variables. Hence, the dependent current source function can be expressed in terms of mesh current variables. Therefore, dependent voltage sources will affect the coefficients of mesh equation,* i.e.,* they will change the Mesh Resistance Matrix. We will see that they can destroy the symmetry of the Mesh Resistance Matrix.

Dependent current sources place constraints on mesh current variables the same way independent current sources do. They cause a reduction in the number of mesh currents to be determined in the circuit. They too affect the coefficients of mesh equations and make Mesh Resistance Matrix asymmetric.

**Example: 4.9-1**

Apply mesh analysis on the circuit in Fig. 4.9-1.

**Fig. 4.9-1** Circuit for Example 4.9-1

**Solution**

Step-1: Carry out mesh reduction by employing source transformation, if relevant.

There are no current sources appearing in parallel with any resistor. Hence, no mesh reduction is possible.

Step-2: Identify meshes and assign mesh current variables.

There are three meshes and there is no current source to impose any constraints on them. Hence, all the three meshes are assigned mesh current variables.

Step-3: Identify the controlling variable of dependent sources in terms of mesh current variables and express dependent source functions in terms of mesh current variables.

*i _{x}* is the controlling variable of

*V*

_{2}.

*i*is the current flowing in

_{x}*R*

_{4}from top to bottom and hence it is equal to (

*i*

_{2}–

*i*

_{3}). Therefore, the source function of

*V*

_{2}is

*k*

_{1}(

*i*

_{2}–

*i*

_{3}) with

*k*

_{1}= – 4.

*v _{x}* is the controlling variable for

*V*

_{3}

*.v*is the voltage across

_{x}*R*

_{1}. Therefore,

*v*=

_{x}*R*

_{1}

*i*

_{1}and the source function of

*V*

_{3}is

*k*

_{2}

*R*

_{1}

*i*

_{1}with

*k*

_{2}= 6.5.

Step-4: Prepare the mesh equations and solve them.

The mesh equations are written with the dependent source functions expressed in terms of mesh current variables.

These equations are expressed in matrix form below.

Note the asymmetry in Mesh Resistance Matrix.

Substituting the numerical values and solving for mesh currents by Cramer’s rule,

Step-5: Apply KCL at various nodes of the circuit to find all the element currents and resistor voltages.

Consider *R*_{4}. Applying KCL at the node formed by *R*_{3}, *R*_{4} and *R*_{5}, we get the current flowing from top to bottom in *R*_{4} as *i*_{2} – *i*_{3}. However, the reference direction that was chosen for current in* R*_{4} is from bottom to top. Hence, current in *R*_{4} = –(*i*_{2} – *i*_{3}) in the direction marked in Fig. 4.9-1. The value is 1A.

This makes the value of* i _{x}* equal to –1A and hence the dependence voltage source

*V*

_{2}source function becomes –4 × –1 = 4V.

Consider *R*_{1}. The reference direction for its current as marked in Fig. 4.9-1 is from left to right and is in the same direction as the first mesh current.* R*_{1} is wholly owned by first mesh and hence current through it is* i*_{1} itself. The value is 1A. That makes the voltage across* R*_{1} equal to 2V. Moreover, the value of* v _{x}* is also 2V. Therefore, the source function of the dependent voltage

*V*

_{1}is 6.5 × 2 = 13 V.

The remaining voltage and current variables also may be evaluated similarly. The complete circuit solution is shown in Fig. 4.9-2.

**Fig. 4.9-2** Complete mesh analysis solution for Example 4.9-1

**Example: 4.9-2**

Apply mesh analysis on the circuit in Example 4.9-2.

**Fig. 4.9-3** Circuit for Example 4.9-2

**Solution**

Step-1: Carry out mesh reduction by employing source transformation, if relevant.

There are no current sources appearing in parallel with any resistor. Hence, no mesh reduction is possible.

Step-2: Identify meshes and assign mesh current variables.

The second mesh current is directly constrained by dependent current source* I*_{1} and the third mesh current is indirectly constrained by *i*_{3} = *I*_{2} +* I*_{1}. Hence, there is only one mesh current variable and that is* i*_{1} in the first mesh.

Step-3: Identify the controlling variable of dependent sources in terms of mesh current variables and express dependent source functions in terms of mesh current variables.

*i _{x}* is the controlling variable of

*I*

_{1}.

*i*is the current flowing in

_{x}*R*

_{1}from left to right and hence it is equal to

*i*

_{1}. Therefore, the source function of

*I*

_{1}is 2

*i*

_{1}A.

*v _{x}* is the controlling variable for

*I*

_{2}.

*v*is the voltage across

_{x}*R*

_{5}. Therefore,

*v*=

_{x}*R*

_{5}(

*I*

_{2}+

*I*

_{1}) =

*R*

_{5}(

*I*

_{2}+ 2

*i*

_{1}) =

*R*

_{5}(2

*i*

_{1}+

*v*÷12) = (8

_{x}*i*

_{1}+

*v*/3).

_{x}∴* v _{x}* = 12

*i*

_{1}and the source function of

*I*

_{2}=

*i*

_{1}A.

Step-4: Prepare the mesh equations and solve them.

The mesh equation for the first mesh is written with the dependent source functions expressed in terms of mesh current variables.

Therefore, the mesh currents are *i*_{1} = 1A, *i*_{2} = 2A and* i*_{3} = 3A.

Step-5: Apply KCL at various nodes of the circuit to find all the element currents and resistor voltages.

Consider *R*_{4}. Applying KCL at the node formed by *R*_{3}, *R*_{4} and *R*_{5}, we get the current flowing from top to bottom in *R*_{4} as *i*_{2} – *i*_{3}. However, the reference direction that was chosen for current in *R*_{4} is from bottom to top. Hence, current in* R*_{4} = –(*i*_{2} – *i*_{3}) in the direction marked in The value is 1 A.

Currents through other resistors and voltage sources may be obtained in a similar manner.

Step-6: Apply KVL in various meshes to obtain the voltage across the current sources.

Apply KVL to the third mesh first.

*v*

_{I}_{2}+ 1 ×(3 – 2) + 4 × 3 + ( –11) = 0 ⇒

*v*

_{I}_{2}= –2V

Now, apply KVL to the second mesh.

*v*

_{I1}+ 1 × 2 – 1(3 – 2) –

*v*

_{I2}= 0 ⇒

*v*

_{I1}= –1 V

The complete circuit solution is shown in Fig. 4.9-4.

**Fig. 4.9-4** Complete mesh analysis solution for the circuit in Example 4.9-2

##### 4.10 SUMMARY

- This chapter dealt with two systematic procedures for solving the circuit analysis problem in the case of memoryless circuits. Memoryless circuits contain linear resistors, linear dependent sources and independent sources.
- Circuit analysis problem for an
*n*-node,*b*-element circuit involves the determination of*b*element voltage variables and*b*element current variables, given the source functions of all independent sources present in the circuit. *Node voltage is the voltage of a node in a circuit with respect to a chosen reference node in the circuit.*In Nodal Analysis, KVL equations are used to show that all element voltages can be expressed in terms of (*n*– 1) node voltages and KCL equations along with element relations are used subsequently to set up the (*n*– 1) node equations needed for determining the node voltages. Nodal Analysis is applicable to any circuit that has a unique solution.*Mesh current is a fictitious current that flows in clockwise direction in the internal periphery of a mesh.*In Mesh Analysis, the KCL equations are used to show that all element currents can be expressed in terms of a reduced set of (*b*–*n*+ 1) specially defined currents called*mesh currents.*Subsequently, (*b*–*n*+ 1) KVL equations involving these currents are set up to determine them. Mesh Analysis is applicable only to circuits that are planar.- Source Transformation Theorem is a valuable aid in both analysis procedures. It states that a voltage source
*v*(_{S}*t*) in series with a resistance*R*can be replaced by a current source_{S}*i*(_{S}*t*)*= v*(_{S}*t*) /*R*in parallel with_{S}*R*without affecting any voltage/current/power variable external to the source. The direction of current source is such that current flows out of the terminal at which the positive of the voltage source is presently connected._{S} - The procedure for
*Nodal Analysis*of a circuit containing linear resistors, linear dependent sources and independent sources is summarized below.

**Nodal Analysis Procedure**

Step-1: Assign reference current directions and reference polarities for voltages of all elements as per passive sign convention. Look for independent voltage sources and dependent voltage sources in series with resistors and apply source transformation on such combinations to convert them into current sources in parallel with resistors. This is called ‘node reduction’. The resulting circuit is referred to as the reduced circuit.

Step-2: Select a reference node. Assign node voltage variables at those nodes where the node voltage variable is not decided directly by a voltage source (independent or dependent source) or indirectly by already assigned node voltage variables and voltage source functions.

Step-3: Identify the controlling variables of dependent sources in terms of the node voltage variables assigned in the last step and express the source functions of dependent sources in terms of node voltage variables.

Step-4: Prepare the node equations for the reduced circuit. Ignore node equation at nodes where voltage sources (independent or dependent sources) are connected directly to reference node. Combine (add) the node equations at the end nodes of voltage sources (independent or dependent sources) connected between two non-reference nodes. The number of equations at the end of this step will be equal to number of nodes minus number of irreducible* independent* voltage sources.

Step-5: Solve for node voltage variables by elimination technique. The equations may also be expressed as a matrix equation and solved by using Cramer’s rule or matrix inversion.

Step-6: Use these node voltage values in the original circuit to obtain element voltages and currents for resistors and voltage across current sources. This is done by applying KVL in various loops in the circuit along with Ohm’s law for linear resistors.

Step-7: Use appropriate node equations to solve for currents through the independent and dependent voltage sources.

- The procedure for
*Mesh Analysis*of a circuit containing linear resistors, linear dependent sources and independent sources is summarized below.

**Mesh Analysis Procedure**

Step-1: Assign reference current directions and reference polarities for voltages of all elements as per passive sign convention. If there are current sources that appear directly across resistors convert them into equivalent voltage sources in series with resistors. This is called ‘mesh reduction’. The resulting circuit is referred to as the reduced circuit.

Step-2: Assign mesh current variables in the reduced circuit starting with leftmost mesh. Assign mesh current variables to a mesh only if its mesh current is not constrained directly by a current source (independent or dependent) and its mesh current is not decided by other mesh current variables already assigned along with current source functions.

Step-3: Prepare the mesh equations by applying KVL in meshes, starting at left bottom corner and traversing the mesh in clockwise direction. Ignore the meshes that are directly constrained by current sources [independent or dependent). Further, if two meshes share a current source, then, add the mesh equations for those two meshes to generate a new equation that will be used in solution process. The number of equations at the end of this step will be equal to number of meshes minus number of irreducible *independent* current sources.

Step-4: Identify the controlling variable of dependent sources in terms of mesh current variables and express dependent source functions in terms of mesh current variables.

Step-5: Solve the mesh equations by elimination technique. The equations may also be expressed as a matrix equation and solved by using Cramer’s rule or matrix inversion.

Step-6: Use the mesh current values and apply KCL at various nodes in the original circuit to obtain element currents and voltages for all resistive elements (use Ohm’s law) and current through voltage sources.

Step-7: Use the element voltages calculated in the above step and apply KVL in various meshes in the original circuit to obtain element voltages for all current sources.

- An
*n*-node circuit containing only linear resistors and independent current sources will have a Nodal representation given by**YV****CU****Y***n*– 1) × (*n*– 1),is the node voltage column vector of order (**V***n*– 1) × 1,is the source current column vector of order**U***n*× 1 and_{cs}**C***n*– 1) ×*n*._{cs}*n*is the number of independent current sources in the circuit. The matrix product_{cs}**CU***net current delivered to a node by all independent current sources connected at that node. The Nodal Conductance Matrix will be symmetric for this kind of circuits.* - The nodal analysis formulation results in an equation
**YV****CU****Y****Y***symmetric*if there are no dependent sources in the circuit. Dependent sources*can*make**Y**asymmetric.**U****V***Y*^{–1}^{}**CU****.** - Each node voltage (and hence all element voltages and currents) can be expressed as a linear combination of input source functions-
*i.e., x = a*_{1}*I*_{1}*+ a*_{2}*I*_{2}*+......*+*b*_{1}*V*_{1}*+ b*_{2}*V*_{2}*+......*where*x*is some node voltage variable or element current/voltage variable and*a*’s and*b*’s are coefficients decided by circuit conductances and connection details. Some of the*a*’s and*b*’s may turn out to be zero for certain choices of*x*. - An
*n*-node,*b*-element circuit containing only linear resistors and independent voltage sources will have a Mesh representation given by**ZI****DU****Z***b*–*n*+ 1) × (*b*–*n*+ 1),**I***b*–*n*+ 1) × 1,**U***n*× 1 and_{vs}**D***b*–*n*+ 1) ×*n*._{vs}*n*is the number of independent voltage sources in the circuit. The matrix product_{vs}**DU***net voltage rise contributed to a mesh by all voltage sources participating in that mesh. The Mesh Resistance Matrix will be symmetric for this kind of circuits.* - The mesh analysis formulation results in an equation
**ZI**where**DU***Z*is the Mesh Resistance Matrix of a reduced order circuit (if mesh reduction is possible) resulting from deactivating all independent sources in it.**Z***symmetric*if there are no dependent sources in the circuit. Dependent sources can make**Z**asymmetric.contains all the independent current source functions and independent voltage source functions. The solution for the mesh current vector*U***I****Z**^{1}**DU**. - Each mesh current (and hence all element voltages and currents) can be expressed as a linear combination of input source functions-
*i.e., x = a*_{1}*I*_{1}*+ a*_{2}*I*_{}_{2}*+...*+*b*_{1}*V*_{1}*+ b*+... where_{2}V_{2}*x*is some mesh current variable or element current/voltage variable and*a*’s and*b*’s are coefficients decided by circuit resistances and connection details. Some of the*a*’s and*b*’s may turn out to be zero for certain choices of*x*.

##### 4.11 PROBLEMS

- Find the power delivered by the –7A current source in the circuit in Fig. 4.11-1 by nodal analysis.
**Fig. 4.11-1** - The node voltages in the circuit in Fig. 4.11-2 are marked in the figure. Find the values for
*R*_{1},*R*_{2},*R*_{3}and*I.***Fig. 4.11-2** - The nodal conductance matrix of the circuit in Fig. 4.11-3 is given below. Find the values of all resistances in the circuit.
**Fig. 4.11-3** - (i) Express all the currents marked in the circuit in Fig. 4.11-4 as linear combinations of
*I*_{1},*I*_{2}and*I*_{3}by nodal analysis. (ii) Solve for*I*_{1},*I*_{2}and*I*_{3}such that currents through*R*_{2},*R*_{3}and*R*_{6}are zero. With these values of current sources, find the currents through remaining resistors.**Fig. 4.11-4** - (i) Express all the currents marked in the circuit in Fig. 4.11-5 as linear combinations of
*V*_{1},*V*_{2}and*I*by nodal analysis. (ii) Solve for*V*_{1},*V*_{2}and*I*such that currents through*R*_{1},*R*_{5}and*R*_{6}are zero. With these values of current sources, find the currents through remaining resistors and the node voltages with respect to bottommost node.**Fig. 4.11-5** - Find
*V*_{1},*V*_{2}and*V*_{3}such that*v*_{1}= 10*V*,*v*_{2}= 10 V and*v*_{3}= 20 V in the circuit in Fig. 4.11-6. With these values of*V*_{1},*V*_{2}and*V*_{3}, find the power delivered by all voltage sources and power dissipated by all resistors. Use nodal analysis.**Fig. 4.11-6** - (i) The nodal conductance matrix of the circuit in Fig. 4.11-7 is given as
**Fig. 4.11-7**S. Find

*k*_{1},*k*_{2}and*k*_{3}and solve the circuit completely by nodal analysis if*I*= 1 A. - Find
*k*_{1},*k*_{2}and*k*_{3}such that the nodal conductance matrix for the circuit in Fig. 4.11-8 is lower triangular. Find the power delivered by independent sources and dependent sources. Use nodal analysis.**Fig. 4.11-8** - Find all dependent source coefficients such that the
**Y****Fig. 4.11-9** - Find
*k*such that**v***k*. Use nodal analysis.**Fig. 4.11-10** - Find
*k*such thatis zero in the circuit in Fig. 4.11-11. Solve the circuit completely for this value of**v***k.*Use nodal analysis.**Fig. 4.11-11** - Find the node voltages and resistor currents in the circuit in Fig. 4.11-12 by nodal analysis.
**Fig. 4.11-12** - The nodal conductance matrix of the circuit in Fig. 4.11-13 is given below. Find the values of all resistances in the circuit.
**Fig. 4.11-13** - Express all the resistor currents in the directions as marked in the form linear combinations of
*V*_{1}*, V*_{2}and*V*_{3}for the circuit shown in Fig. 4.11-14. Use Mesh Analysis.**Fig. 4.11-14** - (i) Express
**v***V*_{1},*V*_{2}and*I*. (ii) Find*I*such that**v***V*_{1}=*V*_{2}= 5 V. (iii) Solve the circuit completely with these source values. Use Mesh Analysis.**Fig. 4.11-15** - All resistors in the circuit in Fig. 4.11-16 are of 2Ω. Find currents in all resistors and voltage across current sources by mesh analysis.
**Fig. 4.11-16** - Find the current delivered to the 12.5 V source, power delivered by all voltage sources and power dissipated in all resistors by Mesh Analysis on the circuit in Fig. 4.11-17.
**Fig. 4.11-17** - Repeat the above problem (Problem 17) by nodal analysis.
- Repeat Problem 5 by using mesh analysis.
- Solve the circuit in Fig. 4.11-18 completely.
**Fig. 4.11-18** - Can the circuit in Fig. 4.11-19 be solved uniquely? If yes, find the solution. If no, find at least two solutions.
**Fig. 4.11-19** - Solve Problem 11 by mesh analysis.
- Express the resistor currents as linear combinations of
*V*_{1},*V*_{2}in the circuit in Fig. 4.11-20. Us mesh analysis.**Fig. 4.11-20**