Chapter 7: The Sinusoidal Steady-State Response – Electric Circuit Analysis

Chapter 7

The Sinusoidal Steady-State Response

CHAPTER OBJECTIVES
  • To define and explain the concept of sinusoidal steady-state.
  • To develop a systematic procedure to analyse sinusoidal steady-state in circuits in terms of steady-state solution for a complex exponential input function.
  • To show how to use phasors, phasor equivalent circuits and phasor diagrams for solving circuits under sinusoidal steady-state condition.
  • To illustrate the application of circuit theorems in phasor equivalent circuits.
  • To introduce complex power and its components and provide detailed interpretation of the power components.
  • To introduce magnetically coupled circuits and explain the application contexts for linear perfectly coupled transformer and ideal transformer.
  • To familiarise the reader with analysis strategies for sinusoidal steady-state response through a large number of solved examples.
INTRODUCTION

A memoryless circuit responds to present value of input and its response variables are quite independent of what the source function values were at prior instants. It does not remember the past inputs in any manner. Hence, response variable in a memoryless circuit will have a waveshape same as that of the input source function.

We had dealt with the memory elements – inductor and capacitor – in single-element circuits in Chapter 3. Now we bring them back into circuits and take up the time-domain analysis of circuits containing R, L, C, linear dependent sources and independent sources. Such circuits are called dynamic circuits. The response at a particular time instant t in such circuits depends not only on the value of inputs at that instant but also on the value of inputs from infinite past to the current instant. The energy storage elements – L and C remember what was done to them from infinite past to the current instant. Their ability to remember can be understood in terms of an inductor’s ability to store flux linkage and a capacitor’s ability to store charge. Alternatively, their memory-capability can be understood in terms of the inductor’s capability to store magnetic energy and capacitor’s capability to store electrostatic energy.

A circuit that contains memory-elements can produce a response that can have a different kind of time-variation compared to the time-variation of input source functions. For instance, if there is only one source and that varies as sinωt, the response variables can be of sin(ωt + θ) type – that is, response can contain cosωt. If there is only one source and that is a square wave of a particular frequency, the response variables need not be square waves at all. In fact, they will assume quite complicated shapes in practice – but they will be periodic waveforms with same period as that of input square wave in the case of linear dynamic circuits.

In general, the response of a dynamic circuit to application of input at t = 0 will contain two components – the natural response component and the forced response component. The total response at any instant after t = 0 is a mixture of the two. The natural response component represents the reaction of inertia in the circuit against the compelling input source function. There is inertia in the circuit since there is memory in the circuit. Memory brings about resistance to change. The circuit adjusts its natural response component in such a way that no inductors and no capacitors are required to change their initial energy storage suddenly as a result of application of input. The natural response terms in a stable circuit usually die down with time. They are called transient response terms due to this. Only the forced response remains after the transient response terms die down to zero. Under this circumstance, the forced response is called the steady-state response if the notion of steady-state is applicable in relation to the input. The notion of steady-state is applicable only if input function possesses some aspects that remain steady in time.

 

Sinusoidal steady-state in a dynamic circuit is that state when all the response variables (i.e., all element currents and element voltages) contain just one component with a sinusoidal waveshape with the frequency same as that of the sinusoidal forcing function applied.

Sinusoidal steady-state, like any other steady-state, can come up in a circuit only after the circuit goes through the transient period that follows the application of sources. The transient period is deemed to have completed when all the transient response terms, which usually have waveshape different from the applied sinusoidal function, have died down to negligible levels.

The next section attempts to provide an overview of transient response of circuits in order to set a background for taking up the study of sinusoidal steady-state. All the topics briefly touched upon in that section will be taken up in great detail in later chapters on time-domain analysis of dynamic circuits. The aim of the next section is only to place the sinusoidal steady-state in the correct perspective.

7.1 TRANSIENT STATE AND STEADY-STATE IN CIRCUITS

The mesh equations (node equations) needed to solve for the response of any circuit – memoryless or dynamic – are obtained by applying Kirchhoff’s Voltage Law in meshes (Kirchhoff’s Current Law at nodes) along with the element equations. The element equation of an inductor is and that of a capacitor is Therefore, the mesh equations (node equations) describing a dynamic circuit will be integro-differential equations. These equations are true for all t since they are obtained from KVL and KCL that are true on an instant to instant basis. Therefore, both sides of such integro-differential equations can be differentiated or integrated with respect to time, if needed. We will be able to eliminate the integral terms in the equations by this technique. The resulting equations will be differential equations and the coefficients of differential equation will be decided by the values of R, L, C and M. Since they are constants in the circuits we consider, the resulting differential equations will be a set of simultaneous linear differential equations with constant coefficients. We illustrate this in two examples in the next sub-section.

7.1.1 Governing Differential Equation of Circuits – Examples

Consider the simple Series RC Circuit in Fig. 7.1-1(a). Assume that capacitor was initially uncharged. The voltage across the capacitor is taken as the response variable. Then, the current through the resistor from left to right can be expressed as (vSvC)/R. Writing KCL at the positive terminal of capacitor,

Fig. 7.1-1 Example circuits illustrating circuit differential equations

Now, we take up the second example circuit in Fig. 7.1-1 and write the two mesh equations as,

This is a set of two first-order simultaneous ordinary differential equations with constant coefficients. The first mesh current variable i2 is selected as the circuit response variable. We have to eliminate il from these two equations and get a single differential equation for i2 in order to find the differential equation describing the circuit. This may be done by substituting Eqn. 7.1-2 in Eqn. 7.1-1 as shown below:

-from Eqn. 7.1-2. Substituting this in Eqn. 7.1-1, we get,

Therefore, the describing differential equation in Fig. 7.1-1 (b) is

These two examples help us to understand the following generalisation.

 

A dynamic circuit is described by a linear, constant-coefficient, ordinary differential equation for one chosen response variable. The coefficients will be decided by circuit parameters. The right-hand side will contain the applied forcing function terms (including their derivatives in general).

7.1.2 Solution of the Circuit Differential Equation

We accept the following from the basic courses in Mathematics. More detailed exposition on these matters will be provided in later chapters on time-domain analysis of circuits.

  • The total solution of a linear constant-coefficient differential equation contains two kinds of terms – the complementary solution terms and the particular integral terms.
  • Complementary solution terms are obtained by solving the differential equation with right-hand side set to zero.
  • Particular integral terms are obtained by solving the differential equation with the forcing function in the right-hand side.
  • Complementary solution terms are of the type Aeαt, where A and α are to be solved for. An nth order linear differential equation with constant coefficients will have n such solution terms. α’s can be obtained by substituting this solution in the differential equation with right-hand side set to zero. A’s can be obtained by applying initial conditions for all derivatives of the dependent variable from zero to (n – 1)th order on the total solution.

The differential equation governing the circuit (a) was.

We try Aeαt as the solution of On substituting the trial solution, we get, Aαeαt + Aeαt = 0. Since this has to be true for all t, we conclude that α + 1 = 0 leading to α = –1.

Now, we attempt to solve for the particular integral. We must specify vS for that. Let us assume that vS = V, a constant source – that is, a DC source. Then the equation we have to solve is given by The only possibility that a time-function and its first derivative can combine to yield a constant for all t occurs when the time-function is a constant. Therefore, we try a constant function as trial solution. Since the first derivative of a constant is zero, the solution must be vC = V.

Therefore, the total solution for vC is vC = Ae–t + V for t > 0.

Since the voltage across a capacitor cannot change instantaneously unless there is an impulse current flow through it, we expect the above expression to approach zero as t→0 from right side. ∴ 0 = Αe–0 + V A = V

Therefore, the complete solution for DC switching problem in Fig. 7.1-1 (a) is. vC = V(1 – e–t) V.

The solution contains two terms; –Vet is the transient response term and V is the steady-state response term. The transient response term vanishes in about 5s or so leaving only the steady-state term. DC steady-state, thus, comes up in this circuit in about 5s after application of DC voltage. The period during which the transient response term is active and non-negligible is called the transient period. The circuit reaches steady-state only after the transient period is over.

The differential equation describing circuit in Fig. 7.1-1 (b) was Consider a DC switching problem with zero initial currents in inductors in this case too.

The complementary solution terms are obtained by trying out Aeαt in the homogeneous differential equation leading to α2 + 3α + 1 = 0. Therefore, α has two values and they are –0.382 and –2.618. Therefore the complementary solution is A1 e–0.382 t + A2 e–2.618 t.

The particular integral for DC switching problem is a constant in this case too. The value of that constant has to be V in order to satisfy the differential equation with V on right-hand side. Therefore, the total solution is i2 = 1 + A1 e–0.382 t + A2 e–2.618 t A. We can find out A1 and A2 by using the initial current values for the inductors, if we desire so. But those values are not important to us here. What is more important is the observation that the total solution again contains two sets of terms – one set which vanishes with time and hence transient in nature and the other which lasts even after transients vanish. The transient response terms come from complementary solution and the lasting component (i.e., the steady-state component) comes from the particular integral. The transient response terms vanish in duration decided by the index in the exponential terms, which are decided by circuit parameters in turn.

7.1.3 Complete Response with Sinusoidal Excitation

Consider the circuit in Fig. 7.1-1 (a) with vS = Vm cosωt V now. This sinusoidal waveform is switched on to the circuit at t = 0.

The complementary solution is the same as before – it is Ae–t. The particular integral has to be obtained from This equation has to be true for all t. That can happen only if both sides of the equation are time-functions with same waveshape. Therefore, must have same waveshape as that of cosωt. That will imply that both vC and must have sinusoidal waveshape. Therefore, we can try vC = a sinωt + b cosωt as a trial solution. Substituting this trial solution in the differential equation and collecting terms, we get,

 

( + b)cos ωt + (a) sin ωt = Vm cos ωt

 

This equation can be true for all t only if the coefficients of sinωt on both sides of the equation are equal and the coefficients of cosωt on both sides of the equation are equal.

The total solution This solution must approach zero value as t → 0 from right side since the initial value of voltage across capacitor is zero. Therefore,

Once again we see that the total response contains a transient term that vanishes as t → ∞ and a steady-state term that persists. The steady-state term is a sinusoidal waveform of same frequency as that of input sinusoid. But it has a phase difference with respect to input sinusoid. It is a phase lag. Both the amplitude and phase of steady-state response component depend on the angular frequency ω of input sinusoid. The steady-state response is given by particular integral and the transient response is contributed by complementary function.

We can proceed the same way in the case of Fig. 7.1-1 (b) too. We solve only for the particular integral of differential equation this time since we know that the transient response will vanish in this circuit. We try out the solution i2 = a sin ωt + b cos ωt in to find the sinusoidal steady-state solution for second mesh current in the circuit when the circuit is driven by Vm cosωt V. Substituting the trail solution in the differential equation and collecting terms, we get,

 

(–ω2b + 3ωa + b) cosωt + (–ω2a – 3ωb + a) sinωt = Vmcosωt

 

Equating coefficients of sinωt and cosωt on both sides of the equation, we get

 

(–ω2b + 3ωa + b) = Vm and (–ω2a – 3ωb + a) = 0

 

Solving for a and b we get

Therefore, the sinusoidal steady-state response for i2 in Fig. 7.1-1 is

We observe once again that the response is a pure sinusoidal waveform at same frequency as that of input sinusoid. But the response has a phase lag with respect to the input. Both the amplitude and phase of response depend on the angular frequency ω of the input sinusoid.

 

The steady-state response of a circuit variable in a linear dynamic circuit under sinusoidal excitation is a sinusoidal waveform of same frequency as that of input. The response will, in general, have a phase difference with respect to input. The amplitude and phase of response under steady-state condition will depend on the amplitude of input and the angular frequency of input sinusoid.

7.2 THE COMPLEX EXPONENTIAL FORCING FUNCTION

The method outlined in the previous section to determine the sinusoidal steady-state response of a dynamic circuit can be summarized as follows:

  1. Use mesh or nodal analysis to obtain integro-differential equations of the circuit.
  2. Differentiate equations again to eliminate integrals, if needed.
  3. Choose one of the mesh currents (or node voltages) as the describing variable for the circuit. Eliminate all the other variables and obtain an nth order linear constant-coefficient differential equation describing the chosen circuit variable.
  4. Assume solution in the form (a sinωt + b cosωt). Substitute the assumed solution in the differential equation. Equate coefficients of cosine and sine on both sides of the equation. Solve for a and b using the resulting equations.
  5. Express the solution in the form of a single sinusoid with phase shift.
  6. Find the other mesh currents (or node voltages) which were eliminated earlier by using the elimination equations in the reverse. Once all the mesh currents (node voltages) are available, any element variable can be obtained from them.

There is nothing wrong with this method – except that it is going to be very tedious if the circuit contains more than two energy storage elements.

Hence, we look for another simpler and more elegant method to obtain sinusoidal steady-state. Euler’s identity, which relates a complex exponential time-function to trigonometric time-functions, is the key to this new method.

 

Euler’s Identity e = cosθ + j sinθ .       (7.2-1)

 

By letting θ = ωt and using Euler’s Identity, we can express ejωt as ejωt = cosωt + j sinωt and by letting θ = –ωt and using Euler’s Identity, we can express ejωt as ejωt = cosωt – j sinωt . Therefore,

ejωt is the complex exponential function of unit amplitude. Equation. 7.2-2 expresses unit amplitude cosine and sine functions of time with an angular frequency of ω in terms of two complex exponential functions of time with ω and –ω in the indices of exponential functions. We can also express sine and cosine functions in terms of complex exponential function in another way too as in Eqn. 7.2-3.

 

cosωt = Re[ejωt ] and sinωt = Im[ejωt ]       (7.2-3)

7.2.1 Sinusoidal Steady-State Response from Response to ejωt

These two ways of expressing trigonometric functions in terms of complex exponential functions suggest two methods to obtain the sinusoidal steady-state response in dynamic circuits. The first method is to obtain steady-state response to complex exponential inputs ejωt and e-jωt and obtain the steady-state response for cosωt as the sum of responses for ejωt and e-jωt. But this will be correct if and only if the particular integral of a linear constant-coefficient differential equation obeys superposition principle. The mathematical theory of such differential equations assures us that it is indeed so.

 

The steady-state response component in linear time-invariant circuits obeys superposition principle.

The second method will be to obtain the steady-state response for a cosωt input as the real part of steady-state response to a complex exponential function ejωt and the steady-state response for a sinωt input as its imaginary part. The underlying reasoning is that since cosωt is the real part of ejωt, the response for cosωt must be the real part of response for ejωt. It looks intuitively evident. But this turns out to be true only for linear circuits. This will be true only if the real part of the input function does not affect the imaginary part of response and the imaginary part of input function does not affect the real part of response. We employ the superposition principle for particular integral of a constant-coefficient linear differential equation to verify that it is so in the case of such differential equations.

ejωt can be viewed as a linear combination of two input functions – cosωt multiplied by 1 added to sinωt multiplied by j. We can view the steady-state response of a linear circuit to ejωt input as the particular solution of the describing differential equation of the circuit to a composite input – cosωt multiplied by 1 added to sinωt multiplied by j. But, particular solution obeys superposition principle. Therefore, steady-state response to ejωt = steady-state response to cosωt + j times steady-state response to sinωt. Therefore,

 

The real part of steady-state response to ejωt = steady-state response to cosωt and the imaginary part of steady-state response to ejωt = steady-state response to sinωt.

Therefore, the second method for determining the sinusoidal steady-state response in terms of steady-state response to complex exponential function will yield correct result for linear circuits.

7.2.2 Steady-State Solution to ejωt and the jω Operator

Both the methods based on complex exponential function will be meaningful only if finding the steady-state response to complex exponential function is simpler and more elegant than finding the steady-state response to sinusoidal input straightaway. We show in the following paragraphs that this is true.

Consider the describing differential equation for the second mesh current in Fig. 7. 1-1 (b) with a unit amplitude complex exponential function driving the circuit. The equation is This equation has to be true for all t and that will be possible only if both the sides of the equation have same waveshape in time. Therefore, the particular integral has to be chosen in such a way that, on substituting the trail solution in the differential equation, the left-hand side yields (.)ejωt. But this will imply that and i2 must have ejωt in them. [In fact, there are special situations in circuits under which this is not strictly true. But we leave special cases to later chapters that deal extensively with time-domain analysis of circuits.] Therefore, we look for some function that has ejωt in its zeroth-order, first-order and second-order derivatives. The only function that comes to our mind is ejωt itself. Therefore, the trial solution for particular integral is A ejωt, where A can now be a complex number.

Substituting this solution in the differential equation, we get,

 

( jw)2[Aejωt ]+ 3( )[Aejωt ]+ [Aejωt ] = ejωt

 

Since this has to be true for all t, we cancel out ejωtand get [()2 + 3( jω) + 1]A = 1. The solution is completed by solving for A.

We note that each differentiation in time has got replaced by a multiplication by jω in the equation determining the complex amplitude in the assumed particular solution. Once we appreciate that point, we can straightaway obtain the equation governing the complex amplitude A of the steady-state response to a complex exponential input by replacing every differentiation in the differential equation by a multiplication by jω and solve for A easily.

Let us generalise this. We consider a linear circuit with one sinusoidal source at angular frequency of ω driving it. If there are more sources, we employ superposition principle and solve many single-source circuits. Hence, the basic problem is to solve the circuit for a single source. The most general differential equation governing a chosen response variable for a linear circuit is

where y is the chosen response variable, x is the input function and a’s and b’s are real positive constants decided by circuit parameters. The order of differential equation, n, is equal to the number of independent energy storage elements in the circuit.

If x = ejωt, then y = A ejωt, where A is a complex amplitude decided by the equation

Therefore, the complex amplitude of steady-state response to a unit amplitude complex exponential input comes out as a ratio of rational polynomials in the variable jω. The desired steady-state response is obtained as

Hence, solving for steady-state response to complex exponential function is much simpler and more elegant than solving for steady-state response to cosine or sine input functions. Therefore, trying to obtain sinusoidal steady-state response indirectly from steady-state response to complex exponential input function is worthwhile.

The method based on Eqn. 7.2-2 and superposition principle – we called it the first method – is the Electronics and Communication Engineer’s favourite. Electrical Power Engineers usually prefer the second method that is based on Eqn. 7.2-3 and superposition principle. Both lead to the same result of course. But, the analysis of sinusoidal steady-state response from the so-called phasor concept evolves from the second method. Hence, we take up the second method for detailed discussion. In this method, we obtain sinusoidal steady-state response for cosωt by obtaining the real part of steady-state response to ejωt input. The sinusoidal steady-state response for sinωt input is similarly the imaginary part of steady-state response to ejωt input. A separate determination of response for cosine and sine input is unnecessary. sinωt is 90° phase delayed version of cosωt and therefore it must be possible to obtain the steady-state response for sinωt input by delaying the steady-state response for cosωt input by 90°. We will verify this in later sections.

7.3 SINUSOIDAL STEADY-STATE RESPONSE USING COMPLEX EXPONENTIAL INPUT

The method developed in the previous section for determining the sinusoidal steady-state response of a linear circuit for sinusoidal input is summarized as follows:

  1. Obtain the differential equation of the circuit in terms of a chosen describing variable y by nodal analysis or mesh analysis and subsequent elimination of all variables other than the chosen one. The differential equation is put in the form shown in Eqn. 7.2-4.
  2. Express the sinusoidal input as x = Xm cos(ωt + θ). This form is needed to accommodate even sine functions. It could be a current source or voltage source and Xm represents the amplitude of the function. Then this function can be seen as the real part of Xmej(ωt + θ).
  3. Assume that the input is x = Xmej(ωt + θ) instead of x = Xm cos (ωt + θ).
  4. Let the steady-state solution for y for this input be yss = Yej(ωt + θ) where Y is the complex amplitude of the response. We use bold face italics for complex amplitudes.
  5. Obtain Y as where a’s and b’s are as in Eqn. 7.2-6. This complex number (which is a function of real variable ω) can be expressed in exponential form as Ym e where Ym is its magnitude and ϕ is its argument (i.e., angle). It can also be expressed in polar form as Ymϕ.
  6. Now, yss = Yme ej(ωt + θ) = Ym ej(ωt + θ + ϕ).
  7. The desired sinusoidal steady-state response is the real part of this. Hence the sinusoidal steady-state response to x = Xm cos (ωt + θ) is y = Ym cos(ωt + θ + ϕ).

This procedure is applied on the circuit shown in Fig. 7.3-1.

Fig. 7.3-1 A two-mesh circuit for illustrating sinusoidal steady-state solution

Applied input is vS(t) = Vm cosωt V. The second mesh current is the chosen circuit variable. Two mesh equations are written first.

Differentiating both sides of second mesh equation with respect to time, we get,

We need to eliminate i1 from Eqns. 7.3-1 and 7.3-3 to get a differential equation for i2.

Differentiating the Eqn. 7.3-1 with respect to time gives us,

Substituting for we get,

Now, we solve the steady-state response for Vmejωt. Let the response be Y=Ymejωt. Then, substituting the solution in the above differential equation,

Therefore, the steady-state response for

The desired sinusoidal steady-state response is obtained by taking the real part of this solution and is =

7.4 THE PHASOR CONCEPT

Solving for particular integral of a differential equation for sinusoidal input has been rendered easy by the use of complex exponential function as shown in the previous sections. But deriving the differential equation remains a tedious affair even now. Arriving at the proper elimination steps require considerable ingenuity in the case of circuits containing many inductors and capacitors. But we can avoid all that. We proceed to see how.

The steady-state response of second mesh current i2 in the circuit in Fig. 7.3-1 for a complex exponential input of Vmejωt was seen to be We evaluate this for ω= 1 rad/sec. Then i2 = 0.447Vme–j26.6°ejt

The equation used for eliminating the first mesh current was Substituting for i2, we get,

Integrating this equation gives us,

We have got the two mesh currents now. Therefore, we can obtain all the circuit variables now. For instance, the current in the common resistor is given by

The voltage across 1H inductor is given by

Based on the above example, we arrive at the following conclusion.

 

All element voltage variables and all element current variables in a linear dynamic circuit driven by a complex exponential function Xm ejωt will assume the form (Ym e) ejωt under steady-state condition where (Ym e) represents the relevant complex amplitude for the variables. Ym will be proportional to Xm.

7.4.1 Kirchhoff’s Laws in Terms of Complex Amplitudes

Consider a mesh containing n elements in a general linear dynamic circuit. Let it be in steady-state condition under complex exponential drive. Let the angular frequency of the complex exponential function be ω. Then we can represent each element voltage variable, vi for i = 1 to n, as vi = (Vimei)ejωt under steady-state condition. We assume for simplicity that we encounter the positive polarity of voltage variable first when we traverse the mesh in clock-wise direction. Then, applying KVL in the mesh results in the following KVL equation.

Thus, the KVL equation under complex exponential steady-state response condition can be written entirely in terms of the complex amplitudes of the steady-state element voltages. The common complex exponential function format ejωt that appears in all element voltages may be suppressed in KVL equations.

Similar conclusion can be stated for KCL equations at nodes of a dynamic circuit under complex exponential steady-state response condition.

KVL equation in a mesh (KCL equation at a node) becomes a mesh equation (node equation) only when mesh currents (node voltages) are used to replace element voltages (currents). We need the element equations for that. Hence we need to see how the complex amplitudes of element voltage and current are related to each other in the case of R, L, C etc.

7.4.2 Element Relations in Terms of Complex Amplitudes

Consider a resistor. Passive sign convention is assumed everywhere. The element equation of a resistor is vR = RiR. Substituting vR = (VRmev)ejωt and iR = (IRmei)ejωt we get (VRmev )ejωt = R(IRmei)ejωt and hence VRm = RIRm and ϕv = ϕi. This implies that a resistor can not bring about a phase difference between the current and voltage variables. Using the bold face italic notation for the complex amplitude, we write the element relation of a resistor for complex amplitudes as follows:

 

VR = RIR          (7.4-1)

 

The element equation of an inductor is Substituting vL = (VLmev )ejωt and iL = (ILmei)ejωt we get (VLmev)ejωt = L()(ILmei )ejωt. This implies that VLm = ωLILm and ϕν = ϕi + 90°. Thus an inductor scales the current amplitude by ωL and adds a 90° phase advance to the current to generate the voltage across it. Using the bold face italic notation for the complex amplitude, we write the element relation of an inductor for complex amplitudes as below.

Thus, the inductor operates upon the complex amplitude of current by the operator jωL to generate the voltage complex amplitude across itself.

 

The amplitude of current in an inductor is 1/ωL times the amplitude of voltage and the current lags the voltage by 90° under sinusoidal steady-state condition.

The element equation of a capacitor isSubstituting vC = (VCmev)ejωt and iC = (ICmei)ejωt we get (ICmejϕi)ejωt = C()(VCmev)ejωt. This implies that ICm = ωCVCm and ϕi = ϕv + 90°. Thus a capacitor scales the voltage amplitude by ωC and adds a 90° phase advance to the voltage to generate the current through itself. Using the bold face italic notation for the complex amplitude, we write the element relation of a capacitor for complex amplitudes as below.

Thus, the capacitor operates upon the complex amplitude of voltage by the operator jωC to generate the complex amplitude of current through it.

 

The amplitude of current in a capacitor is ωC times the amplitude of voltage and the current leads the voltage by 90° under sinusoidal steady-state condition.

7.4.3 The Phasor

Electrical Engineers decided long back that a new name is required for what we have been calling the complex amplitude. Complex amplitude is the number that gives the amplitude of complex exponential function and the phase of the complex exponential function in the form of a single complex number. Its magnitude gives the amplitude of the signal and its angle gives the phase of the signal. The phase is referred to the standard ejωt reference function. Electrical Engineers call complex amplitude a phasor.

 

Phasor is a complex number that gives the amplitude of complex exponential function and the phase of the complex exponential function with the time-variation of the function understood as ejωt. It can be used as a representation for a sinusoidal function.

Thus phasor is just a new name for what we have understood till now as complex amplitude.

The process of starting with a sinusoidal function and ending up with its phasor representation is called Phasor Transformation. We summarize the steps involved in this transformation.

 

  • Express the given sinusoidal function in the form x(t) = Xm cos (ωt + θ).
  • Write x(t) as the real part of Xm ej(ωt + θ).
  • Suppress the qualifier real part.
  • Suppress ejωt after noting the value of ω for later use.
  • The resulting complex number X = Xm eis the phasor representation for x(t). The bold face italic notation stands for the magnitude and angle together. The symbol may be used in hand-written text.

Once we get the answer for a circuit analysis problem in phasor representation, we need to go back to time-domain to get the time-domain output that we wanted really. We start in the time-domain, we want to end up in the time-domain and the netherworld of phasors is only a temporary sojourn. The steps involved in inverse phasor transformation are listed below.

 

  • Obtain the magnitude Xm and angle θ of the phasor and put it in Xm eform.
  • Multiply Xm e by ejωt and express it in Xm ej(ωt + θ) form.
  • Get the real part as Xm cos (ωt + θ) by using Euler’s Identity.

We are free to express the time-function as x(t) = Xm sin(ωt + θ). The phasor representation will remain the same. But imaginary part will be implied everywhere.

The steps in forward and inverse phasor transformation are easy and can be done by inspection with a little practice. For instance, if X = 1 + j1, then the magnitude is √2 and angle is 45° and the time-domain waveform is √2cos(ωt + 45°) if we started with a cosine and it is √2sin(ωt + 45°) if we started with a sine. Of course we need to know the value of ω in addition to X. The phasor representation of a sinusoidal waveform will not contain the frequency information. Frequency has to be known separately.

7.5 TRANSFORMING A CIRCUIT INTO PHASOR EQUIVALENT CIRCUIT

We have already seen that we can write the KVL and KCL equations directly in terms of complex amplitudes (i.e., phasors) and that there are well-defined relations between complex voltage amplitude (i.e., voltage phasor) and complex current amplitude (i.e., current phasor) for all two-terminal elements.

The ratio of voltage phasor to current phasor is equal to R in the case of a resistor. It is jωL in the case of an inductor and it is 1/jωC in the case of a capacitor.

These facts suggest that we need not write down the mesh and node equations in time-domain at all. We can write them in terms of mesh current phasors or node voltage phasors using the element relation that ties up voltage phasor of the element to current phasor of the element. The resulting equations will be algebraic equations involving phasors. Thus phasor transformation of all circuit variables results in a set of simultaneous algebraic equations rather than simultaneous differential equations. Eliminating variables and solving for the desired circuit variable is far easier when we deal with algebraic equations than when we deal with differential equations.

 

The circuit that will help us to deal with steady-state response to complex exponential input as if it is a memoryless circuit is called the phasor equivalent circuit of the dynamic circuit.

7.5.1 Phasor Impedance, Phasor Admittance and Phasor Equivalent Circuit

First we generalise the concept of resistance to accommodate a more general relationship between voltage and current than a simple scaling. The ratio between the voltage phasor and current phasor at a pair of terminals will, in general, be a complex number indicating that the circuit connected between the pair of terminals is capable of scaling the amplitude and imparting phase shift to one quantity with respect to the other. We define this ratio as the driving-point phasor impedance at the pair of terminals and represent it as Z(). Its unit is Ohms. The reciprocal of the ratio – i.e., the ratio of current phasor to voltage phasor at a pair of terminals – is defined as the driving-point phasor admittance at the terminals and represent it as Y(jω). Its unit is siemens or mhos. See Fig. 7.5-1.

Fig. 7.5-1 Driving-point impedance and admittance under sinusoidal steady-state

Thus, if V = Vm ejϕv and I = Im ei are the voltage and current phasors as per passive sign convention at a pair of terminals, then, the phasor impedance function and the phasor admittance function Note that both impedance function and admittance function is represented as functions of jω. They are in fact complex functions of a real variable ω and not complex functions of an imaginary variable as indicated by the notation. The j in serves to remind us they are complex functions.

The magnitude of the complex Z gives the ratio of amplitudes of voltage phasor and current phasor. The angle of Z gives the angle by which the current lags the voltage phasor.

The real part of Z is the resistance part of Z and the imaginary part of Z is defined as its reactance part. Similarly, the real part of Y is the conductance part of Y and the imaginary part of Y is defined as its susceptance part. Thus Z = R + jX and Y = G + jB where X is the reactance and B is the susceptance. Reactance has ohms as its unit and susceptance has siemens as its unit.

We have already derived the relation between voltage and current phasors for R, L and C earlier. Thus we conclude the following with the help of Eqns. 7.4-1 to 7.4-3.

 

Z(jω) = R and Y() = 1/R for a resistor of R Ω.

Z(jω) = jωL and Y() = 1/jωL for an inductor of L henries.

Z(jω) = 1/jωC and Y() = jωC for a capacitor of C farads.

The phasor equivalent circuit is formed by carrying out the following steps:

  1. Convert all sinusoidal sources at a single frequency ω into their phasor representations and mark them near the source symbols. There is no change in the graphic symbols used. Cosine function is assumed in time-domain by default.
  2. Replace all passive elements by their phasor impedance/admittance and linear dependent sources by their phasor relations. The graphic symbols used for all elements will be the same in the original circuit and in its phasor equivalent circuit.

The procedure is illustrated for the circuit in Fig. 7.5-2.

The first source function 200 sin 314t is expressed as 200 cos (314t – 90°). Then the first source voltage phasor is 200 ej90° in exponential form, 200∠–90º in polar form and 0–j 200 in rectangular form.

The second source function 250 sin(314t–45°) is expressed as 250 cos(314t – 135°). Then the second source voltage phasor is 250 e–j135° in exponential form, 200∠–135º in polar form and – 176.77 – j 176.77 in rectangular form.

The value of ω = 314 rad/s. Therefore the 4mH inductor will have an impedance of j1.256 Ω, the 5mH inductor will have j1.57 Ω and the 10mH inductor will have j3.14Ω. The impedance of 100μF capacitor will be 1/j0.0314 = –j 31.85 Ω.

We see that impedances of inductor and capacitor are purely reactive. The reactance of an inductor is a positive quantity, whereas the reactance of a capacitor is a negative quantity. Similarly, the susceptance of an inductor is a negative quantity, whereas the susceptance of a capacitor is a positive quantity.

The phasor equivalent circuit of the circuit in Fig. 7.5-2 is now completed as in Fig. 7.5-3.

Fig. 7.5-2 Circuit for illustrating phasor equivalent circuit

Fig. 7.5-3 Phasor equivalent circuit  of circuit in Fig. 7.5-2

7.6 SINUSOIDAL STEADY-STATE RESPONSE FROM PHASOR EQUIVALENT CIRCUIT

We now know how to convert the sinusoidal source functions to their phasor representations and how to construct the phasor equivalent circuit employing phasor impedances and phasor admittances for steady-state analysis of dynamic circuits for complex exponential inputs. Steady-state analysis for complex exponential input and steady-state analysis for sinusoidal input are effectively the same. Only phasor transformation comes in between them.

Systematic application of KVL and KCL, along with element relationships that tie up the phasor voltage of an element to the phasor current through that element, will lead to sinusoidal steady-state solution in circuits in principle. However, systematic and routine analysis procedures will be quite welcome in this case too, as they were in the case of time-domain analysis of memoryless circuits. This prompts us to compare the memoryless circuit time-domain analysis problem with the sinusoidal steady-state analysis problem in dynamic circuits. The aim of such a comparison is to determine whether we can employ the analysis methods we developed in the context of memoryless circuits to the sinusoidal steady-state analysis problem. Moreover, we would like to verify whether the circuit theorems developed in the context of memoryless circuits will hold in the case of dynamic circuits in sinusoidal steady-state.

7.6.1 Comparison between Memoryless Circuits and Phasor Equivalent Circuits

  1. The sources and circuit variables in a memoryless circuit are, in general, functions of time. DC resistive circuits form a sub-class of memoryless circuits in which all sources are constant-valued. The source functions and circuit variables in a phasor equivalent circuit are phasors which are complex amplitudes of complex exponential functions of a common format ejωt, where ω is the angular frequency of all sinusoidal sources active in the circuit. A phasor equivalent circuit can be drawn only if all sources are of the same frequency in that circuit. If a dynamic circuit contains sinusoidal sources with different frequencies, phasor equivalent circuits for different frequencies have to be prepared separately and superposition principle has to be used to combine the solution from various phasor equivalent circuits. Thus a phasor equivalent circuit prepared for a particular value of ω is similar to a memoryless circuit driven by constant sources. The difference is that, in phasor equivalent circuit the constant sources are complex-valued whereas in memoryless circuit the constant sources are real-valued. Similarly, all circuit variables in a phasor equivalent circuit are complex-valued constant quantities in time whereas they are real-valued constant quantities in time in the case of a DC memoryless circuit. Indeed, all the circuit variables in a dynamic circuit under sinusoidal steady-state are varying in time; but this time-variation has been absorbed in the term ejωt which is a common factor in all circuit variables and which is suppressed in the phasor equivalent circuit.
  2. The only passive element permitted in the memoryless circuit is the resistor. The voltage across a resistor is proportional to current through it with proportionality constant that is real-valued. Dependent sources with source functions of the form y = kx, where x is the controlling variable, y is the controlled variable and k is a real-valued proportionality constant, are allowed in a memoryless circuit. Thus, we see that, all the elements permitted to be present in such a circuit (except independent sources) can only scale (i.e., result in a multiplication by a constant) circuit variables. The resulting circuit equations will be simultaneous algebraic equations tying up all the instantaneous voltage and current variables (real-valued constant quantities in the case of DC excitation) in the circuit.
  3. All kinds of linear passive elements, including dependent sources of the type y = k1 x + k2 x' + k3 x' + ..., where primed variable indicates derivatives, are permitted in a dynamic circuit. However, once a phasor equivalent circuit using phasor impedances or phasor admittances for the elements is constructed, only scaling of phasors through impedances and admittances can take place in the circuit. The resulting circuit equations will be simultaneous algebraic equations tying up the various phasor voltage and phasor current values (complex-valued constant quantities for a particular ω) in the phasor equivalent circuit.
  4. Therefore, a memoryless circuit driven by DC sources and a dynamic circuit driven by sinusoidal sources of same frequency under sinusoidal steady-state will have similarly structured equations of analysis. The only difference is that the variables in a memoryless circuit are real-valued, whereas variables in a dynamic circuit under sinusoidal steady-state are complex-valued.
  5. Two circuit analysis techniques called nodal analysis and mesh analysis were developed for memoryless circuits in Chapter 4. We did not depend explicitly or implicitly in any way on the ‘real-valued’ nature of circuit variables to arrive at these analysis procedures in that chapter. Hence those analysis techniques should remain valid even when the circuit variables and element impedances turn out to be complex numbers.
  6. Similarly, all the circuit theorems which depend on properties of Nodal Conductance Matrix and Mesh Resistance Matrix and linearity for their proof should remain applicable to phasor equivalent circuits too, provided, the criterion of ‘sinusoidal steady-state’ does not conflict with the assumptions underlying the theorems in any manner.
  7. A straightforward application of KVL and KCL will show that the series equivalent impedance of n phasor impedances connected in series will be given by Zeq = Z1 + Z2 + ... + Zn and that the parallel equivalent admittance of n phasor admittances connected in parallel will be equal to Yeq = Y1 + Y2+ ... +Yn

The nodal analysis and mesh analysis techniques developed for memoryless circuits apply to phasor equivalent circuits with no change except that impedance Z takes the place of resistance R and admittance Y takes the place of conductance G. Nodal Conductance Matrix will get called Nodal Admittance Matrix Ym and Mesh Resistance Matrix will get called Mesh Impedance Matrix Zm in the sinusoidal steady-state analysis using phasor equivalent circuits. They will be symmetric complex matrices if the phasor equivalent circuit contains no dependent sources.

7.6.2 Nodal Analysis and Mesh Analysis of Phasor Equivalent Circuits – Examples

The nodal analysis and mesh analysis techniques for obtaining sinusoidal steady-state response quantities using phasor equivalent circuit is illustrated through some examples in this sub-section.

Example: 7.6-1

Find the steady-state current and average power dissipated in the resistor in an R–L series circuit with R = 100 Ω and L = 1 H when driven by a switched sinusoidal source vS(t) = 325 sin100πt u(t) V.

Solution

That vS(t) = 325 sin100πt u(t) V makes it clear that the sinusoidal source was switched on to the circuit only at t = 0. Hence, the steady-state situation will come up in the circuit only after some time and we should not expect the solution that we work out based on phasor equivalent circuit to hold during the initial period after switching on the source.

The angular frequency of the source is ω = 100π rad/sec. The value of reactance of the 1H inductor at this angular frequency = 100π×1 = 314.15 Ω and hence the impedance of this inductor is j314.15 Ω. Note that reactance is a real number, whereas impedance is a complex number.

We need to represent the source function in cosine form first. vS(t) = 325 sin100πt = 325 cos (100πt – 90°). Therefore, the phasor representation of the source is Vs = 325 ∠–90° V. The circuit in time-domain and circuit in phasor domain are shown in Fig. 7.6-1.

Fig. 7.6-1 (a) The circuit in time-domain and (b) The phasor equivalent circuit for Example 7.6-1

This is a single mesh circuit and the mesh current I1 is identified in the phasor equivalent circuit in Fig. 7.6-1 (b). The mesh equation is obtained as

 

(100 + j314.15)I1 = 325 ∠–90°

Solving for I1, we get,

Going back to time-domain by inverse phasor transformation, we get,

The source voltage and circuit current waveforms are shown in Fig. 7.6-2 (a) and (b).

The current waveform as drawn in (a) is wrong. Remember that we have obtained the sinusoidal steady-state solution only and not the complete circuit solution for all t > 0. Sinusoidal steady-state gets established only in the long run. The time taken for that will depend on circuit parameters. We will learn how to estimate the time required for a given circuit to reach sinusoidal steady-state in later chapters. We may accept the fact that it takes about 5L/R seconds (i.e., about 50 ms in this circuit) for an R–L circuit to reach steady-state. Therefore, strictly speaking, the sinusoidal steady-state waveforms should be marked in time-axis as shown in Fig. 7.6-2 (b). It is understood that the t used in the axis marking in (b) can have any value greater than 50 ms or so.

Fig. 7.6-2 Source voltage and circuit current waveforms in Example 7.6-1 with (a) Misleading time-axis marking (b) Correct time-axis marking

The waveform as shown in (a) is wrong from another point of view too. We remember that the voltage applied to the circuit was zero prior to t = 0. According to (a), the current suddenly changed from zero to a –ve value at t =0. It is true that this value of current will exist in the circuit whenever voltage goes through a positive-going zero-crossing once the circuit has reached steady-state. But the current cannot do that at the first zero-crossing of voltage itself since it will be the violation of law of causality then. How did the circuit know while it was at t = 0 that the zero voltage that it is being subjected to at that instant is somehow different from the zero voltage that it was subjected to at the prior instants? Could it have anticipated that the voltage is going to rise and could it have raised its current instantaneously as per its anticipation about what the voltage waveform is going to do in future after t = 0 while it was at t = 0? No physical system can do that sort of a thing. All physical systems are non-anticipatory. The last sentence is yet another form of law of causality. Hence the current waveform as shown in (a) violates law of causality.

We note from this example that (i) the impedance of an R–L circuit has positive angle which is tan–1(ωL/R) in general (ii) the current in an R–L circuit lags the voltage waveform under steady-state conditions by tan1(ωL/R) in general.

Average power delivered to resistor = ( I1rms)2 R = (0.986/√2)2 × 100 = 48.6 W

Average power delivered to the resistor can also be calculated by calculating the power delivered by the voltage source minus the average power delivered to the inductor. The first quantity is given by 0.5 Vm I1m cosθ where θ is the phase angle by which the voltage phasor leads the current phasor. The angle in this case is + 72.34°. Therefore average power delivered by the source is 0.5 × 325 × 0.986 × cos(72.34°) = 48.6 W.

The voltage phasor across the inductor = j314.15 × 0.986 ∠–162.34° = 309.75 ∠–72.34° V.

∴ Voltage across inductor = 309.75 cos(100πt –72.34°) = 310.34 sin(100πt + 17.66°) V.

∴ The phase angle between inductor voltage and current = + 17.66° – (–72.34°) = + 90°

This is the expected value since the voltage across an inductor is expected to lead ahead of its current under sinusoidal steady-state. Since cosine of 90° is zero, the average power delivered to the inductor under sinusoidal steady-state condition is zero. Therefore, the average power delivered to the resistor is the same as the average power delivered by the voltage source and is equal to 48.6 W.

Example: 7.6-2

Find the steady-state current and average power dissipated in the resistor in an R–C series circuit with R = 100 Ω and C = 1 μF when driven by a switched sinusoidal source vS(t) = 325 sin100πt u(t) V.

Solution

The impedance of the capacitor at an angular frequency of ω rad/s is a purely reactive one of the form 0 + jXC and is equal to 1/jωC. Its reactance value XC is then –1/ωC. The time-domain circuit and phasor equivalent circuit are shown in Fig. 7.6-3.

Fig. 7.6-3 (a) The RC circuit in time-domain and (b) Its phasor equivalent circuit in Example 7.6-2

This is a single mesh circuit and may be solved by using its mesh equation. But we do not need even the mesh equation. It is a series connection of two impedances across a source voltage. The equivalent impedance is R + 1/C = R –j/ωC. Hence, the impedance of an RC series circuit has a negative angle.

The current phasor in the circuit is given by voltage phasor divided by phasor impedance. Hence

Thus, a Series RC Circuit adds a positive phase angle to the voltage phasor in transforming it into current phasor. The current in an RC circuit leads the voltage waveform by 90°–tan1 (ωRC).

We calculate the impedance in the present instance by substituting the relevant numbers.

The circuit current leads the applied voltage by 72.54°.

Average power delivered to resistor = (I1rms)2 R = (0.975/√2)2 × 100 = 47.53 W.

Average power delivered to the resistor can also be calculated by calculating the power delivered by the voltage source minus the average power delivered to the capacitor. The first quantity is given by 0.5 Vm I1m cosθ, where θ is the phase angle by which the voltage phasor leads the current phasor. The angle in this case is –72.54°. Therefore average power delivered by the source is 0.5×325×0.975×cos(–72.54°) = 47.53 W.

The voltage phasor across the capacitor = –j318.3 × 0.975 ∠–17.46° = 310.34 ∠–107.46°

∴ Voltage across capacitor = 310.34 cos(100πt – 107.46°) = 310.34 sin(100πt – 17.46°) V.

∴ The phase angle between capacitor voltage and current through it = –17.46° – 72.54° = –90°

This is the expected value since the voltage across a capacitor is expected to lag behind its current under sinusoidal steady-state. Since cosine of –90° is zero, the average power delivered to the capacitor under sinusoidal steady-state condition is zero. Therefore, the average power delivered to the resistor is the same as the average power delivered by the voltage source and is equal to 47.53 W.

Fig. 7.6-4 (a) Applied voltage and current (b) Capacitor voltage and current in Example 7.6-2

Figure 7.6-4 shows the applied voltage waveform lagging behind the circuit current in (a) and the capacitor voltage lagging behind the current by 90° in (b). Of course, a physical system can only delay the response with respect to input. Hence the phase lead that the current in a capacitive circuit exhibits under sinusoidal steady-state condition should not be understood as a time-advance. The apparent time-advance comes up only after the response undergoes a delay during the transient period.

Example: 7.6-3

Find the (i) source current, (ii) source power, (iii) output voltage and (iv) power delivered to 25Ω resistor in the circuit in Fig. 7.6-5.

Fig. 7.6-5 Circuit for Example 7.6-3

Solution

The source voltage phasor is 300∠0° V.

The dependent sources involve first derivative of controlling currents. But differentiation in time-domain is to be replaced by multiplication by jω in the phasor equivalent circuit. The value of ω in this example is 100 rad/s. The phasor equivalent circuit of the circuit is given in Fig. 7.6-6. The mesh equations are written as follows:

Recasting these equations in matrix form,

Fig. 7.6-6 The phasor equivalent circuit for the circuit in Fig. 7.6-5

Solving for I1 and I2, we get

Source power = 0.5 × 300 × 4.18 × cos(0– (–44.72°)) = 445.5 W.

Average power delivered to 25Ω = 0.5 ×5.88×5.88×25 = 432.2 W.

[This is an equivalent circuit for a 2:1 two-winding transformer using dependent sources to model the mutual coupling between the windings. Note that the output voltage is almost equal to half of the input voltage and almost in phase with it. The presence of the 1Ω and 0.25Ω resistors make the output amplitude slightly less than 150 V and phase of output slightly different from zero. These resistors model the inevitably present winding resistances.]

Example: 7.6-4

A pair of AC voltage sources with same frequency connected through an inductance is called a synchronous link in Electrical Power System Engineering. The sources are generating stations and the inductance is that of the high voltage transmission line that links up the stations. When two DC sources are linked together by means of a resistance, the higher voltage source sends power to the lower voltage source. But when two AC sources at same frequency are linked together, it is not the magnitude of voltage that decides the magnitude and direction of power flow.

Fig. 7.6-7 A synchronous link

Show that in the synchronous link in Fig. 7.6-7, the leading voltage source sends average power to the lagging voltage source and that for small phase difference between the two sources the power exchanged is proportional to phase difference in radians.

Solution

The frequency is not given specifically, however, the reactance value of the inductor is directly specified as X and the word synchronous implies that both sources are at the same frequency. The source voltages are specified as rms values and this is a common practice in Electrical Power Engineering. Electronics and Communication Engineers prefer to specify amplitude rather than rms value. In this book, if rms value is specified, it will be explicitly mentioned after the unit of the quantity.

The current phasor I from first source to second source is found in the following:

The source voltage time-function for first source is

 

v1(t) = √2V1 cos(ωt + δ1)

We find the average power delivered by the first source by taking the two terms in current one by one. The first component is a cosωt component and the phase angle by which the voltage leads this component is δ1. Therefore, average power delivered through this current, P1, is

The second current component is a sinωt i.e., a cos(ωt – 90°) component. The phase angle by which the voltage leads this component is 90° + δ1. Therefore, the average power delivered through this current, P2, is

Adding P1 and P2 to get the total average power delivered by the first source,

Therefore, in the synchronous link shown in Fig. 7.6-7, average power flows from leading voltage source to lagging voltage source quite independent of the voltage magnitude relationship between them. Moreover, for small phase difference between the two sources, the power flow is proportional to the phase difference in radians.

Example: 7.6-5

The source current in the circuit in Fig. 7.6-8 is iS(t) = Im cosωt A. Find ω and k such that the current iy is in phase with iS(t) and has the same amplitude as that of iS(t).

Fig. 7.6-8 Circuit for Example 7.6-5

Solution

The phasor equivalent circuit is shown in Fig. 7.6-9.

Fig. 7.6-9 The phasor equivalent circuit for circuit in Fig. 7.6-8

The dependent source current value is This source is transformed into a dependent voltage source of value in series with Rc. Source transformation theorem is applicable under sinusoidal steady-state condition. Three meshes and the mesh current phasors are as shown in Fig. 7.6-9. The mesh impedance matrix can be written by inspection. Hence, the mesh equations in matrix form will be as below.

The determinant of the mesh impedance matrix after some simplification is

We need to solve for I3.

We want the angle of I3 to be the same as that of Is. This is possible only if Δz is a negative real number because the numerator is a real negative number. Therefore imaginary part of Δz should go to zero at the ω we are looking for.

Therefore,where

We also want the magnitude of the two currents to be the same. Therefore,

Substituting where and and simplifying, we get the required value of k as

[This is the small-signal equivalent circuit used to analyse the conditions for sinusoidal oscillation to take place in a Transistor Phase Shift Oscillator circuit that is widely used to generate low power sinusoidal signals up to about 20 kHz frequency.]

Example: 7.6-6

The circuit in Fig. 7.6-10 is the phasor equivalent circuit of a small power system running at 50 Hz containing two generating stations and one load sub-station. The transmission lines connecting the generating stations to the load station and between them are modelled by a series R–L impedance.

Fig. 7.6-10 Phasor equivalent of a simple power system circuit for Example 7.6-6

A modern power system will have voltage values ranging from 230 Vrms at customer premises to hundreds of kV at transmission level. Similarly, the currents at various locations may have a spread of 1:1000 or even more. Thus the range of numbers involved in a power system analysis problem is  numerically inconvenient in the Solution process. Power System Engineers have solved this problem by evolving a special kind of normalization scheme for the quantities in the phasor equivalent circuit of a power system. This scheme is called per unit representation. We do not intend to go into the details of per unit system. However, we note the fact that all nominal voltage values everywhere become values close to unity in this scheme. The values marked in the circuit in Fig. 7.6-10 is as per this scheme. But for our purposes here, we may choose to view them as actual rms values themselves.

All the three lines have 0.02 + j0.1 Ω impedance at 50 Hz. The load connected at C is 2Ω in parallel with j2Ω inductive reactance. Solve the given circuit for (i) all line phasor currents, (ii) phasor voltage at load station C, (iii) power delivered by sources at A and B and (iv) power delivered to the load at node C.

Solution

This is a nodal analysis problem. The fact that two nodes are constrained by voltage source does not prevent us from writing node equations at those nodes. We simply assume that the currents injected into node A and node B by the respective voltage sources are IA and IB and make use of these in nodal equations.

The admittance of the R–L impedance of lines is 1/(0.02 + j0.1) = 9.81∠–78.7° = 1.92–j9.62 S. The admittance of the parallel R–L connection at node C is 0.5–j0.5 We write the node equations by inspection.

We have used the known voltage phasors at node A and node B. There is no source connected at node C and hence there is no current injection at that node from reference node. VC can be obtained by using the third equation,

(–1.92 + j9.62)(1.05∠5°) + (–1.92 + j9.62)(1∠4°) + (4.34–j19.74)VC = 0.

Solving for VC, we get,

VC = 0.969 + j0.0574 = 0.971∠3.39° V rms

Next we find the currents injected by the voltage sources by making use of this value of VC in the first two equations from the matrix nodal equation.

IA = (3.84–j19.24) (1.05∠5°) + (–1.92 + j9.62) (1∠4°) + (–1.92 + j9.62)(0.971∠3.39°)

IB = (–1.92 + j9.62)(1.05∠5°) + (3.84–j19.24) (1∠4°) + (–1.92 + j9.62) (0.971∠3.39°)

Therefore,

IA = 0.5037 – j0.1580 = 0.528∠–17.42° A rms

IB = 0.0095 – j0.2978 = 0.298∠–88.2° A rms

VA = 1.05∠5°and IA = 0.528∠–17.42°. Therefore, the phase angle by which the voltage leads current is 5° – (–17.42°) = 22.42°. Therefore, average power delivered by source at node A = 1.05 × 0.528 × cos22.42° = 0.513 W.

VB = 1∠4° and IB = 0.298∠–88.2°. Therefore, the phase angle by which the voltage leads current is 4° – (–88.2°) = 92.2°. Therefore average power delivered by source at node A = 1– × 0.298 × cos92.2° = –0.0114 W. We used P = VrmsIrms cosθ for these calculations, where θ is the phase angle by which voltage phasor leads current phasor.

Power delivered to the load at node C = power delivered to 2Ω resistor + average power delivered to 2Ω reactance = 0.971×0.971/2 + 0 = 0.471 W. We used the expression P = Vrms2/R for this calculation.

The line currents are found out by dividing the phasor difference between voltage phasors at two ends of the line by the line impedance.

Line AC – from A to C = [1.05∠5° – 0.971∠3.39°] ÷ (0.02 + j0.1) = 0.339 – j0.204 A rms

Line BC – from B to C = [1∠4° – 0.971∠3.39°] ÷ (0.02 + j0.1) = 0.174 – j0.251 A rms

Line AB – from A to B = [1.05∠5° – 1∠4°] ÷ (0.02 + j0.1) = 0.165 + j0.047 A rms

Verification

The line currents from A to C and from A to B must add up to IA. The line current from B to C minus current from A to B must be IB. These are verified within numerical rounding errors.

The reader is encouraged to verify the power flow principle in synchronous links brought out in Example: 7.6-4 with the results obtained in this example.

Example: 7.6-7

The circuit in Fig. 7.6-11 shows a 50 Hz, 230 V rms AC voltage source delivering power to a 10Ω// j20Ω inductive load through a feeder line of series impedance 0.4 + j1 Ω. (i) Find the current phasor delivered by the source, load voltage phasor, average power delivered to load and efficiency of power for delivery if the capacitor C is disconnected. (ii) Repeat part (i) with XC = –20 Ω.

Fig. 7.6-11 Phasor equivalent circuit Example 7 6-7

Solution

  1. We use voltage division principle to determine load voltage first. The parallel combination of 10Ω and j20Ω is in series with 0.4 + j1Ω. Therefore, voltage across load, VL is obtained as

    Now the current delivered by the source is obtained as

    Power delivered to load can be found in two ways. First method is to apply VrmsIrms cosθ to the load voltage and load current. Load voltage is 210.2∠–4.2° and load current is 23.5∠–30.8°. Therefore, θ = –4.2°–(–30.8°) = 26.6° and cosθ = 0.8942. Therefore, average power delivered to load = 210.2 × 23.5 × 0.8942 = 4418 W.

    The second method to find load power is to find the power delivered to the 10Ω resistor by applying P = Vrms2/R. The average power delivered to an inductance is zero. Therefore load power is the same as average power in resistor. Therefore, load power is 210.22/10 = 4418 W.

    The average power delivered by source is calculated as 230 × 23.5 × cos30.8° = 4643 W.

    Therefore efficiency of power delivery = 100 × 4418/4643 = 95.15%

  2. With XC at –20Ω, the reactance of inductor and capacitor in parallel cancel each other as can be seen from j20 / / – j20 open-circuit. Therefore, the load circuit is effectively only a resistor of 10Ω.

    Now the current delivered by the source is obtained as

    The average power delivered to load = 220.142 /10 = 4846 W

    The average power delivered by source = 230 × 22 × cos(–5.5°) = 5037 W

    Efficiency of power delivery = 100 × 4846/5037 = 96.21%.

    We observe that connecting a capacitor across an inductive load results in (i) better load voltage, (ii) lower source current, (ii) lower phase difference between source voltage and source current and (iv) lower losses in feeder line. Thus there is overall improvement in system performance when the capacitor is connected across the inductive load. We had shown in Example: 6.4-5 in Section 6.4 of Chapter 6 that when a sinusoidal voltage source is delivering power to load, a given amount of source power is transferred to load with minimum losses and maximum efficiency when the load draws current from source at zero phase difference at the source terminal. An inductive load draws a lagging current. Connecting a capacitor across such a load makes the total current less lagging and closer to zero phase condition.

    This method of improving the phase between source voltage and source current is called capacitive compensation of an inductive load.

Example: 7.6-8

The circuit shown in Fig. 7.6-12 is the small-signal equivalent circuit of a transistor amplifier for analysis of operation at high frequency. Find the gain, i.e., ratio of output voltage phasor to input voltage phasor at 1 MHz.

Fig. 7.6-12 Equivalent circuit of a transistor amplifier at high frequency

Solution

As a first step, we convert the circuit to the left of 100pF capacitor to current source in parallel with a resistor by applying Norton’s Theorem in time-domain itself. The resulting Norton’s equivalent and the complete circuit with the Norton’s equivalent in place are shown in Fig. 7.6-13.

Fig. 7.6-13 Norton’s equivalent of input side of the circuit in Fig. 7.6-12

Let vS(t) = Vm cosωt V with ω = 2π × 106 rad/s. The admittance of 5pF and 100pF capacitors are calculated as j3.1416×105 Ʊs and j6.283×10–4 Ʊs, respectively, at 1 MHz. The conductance of 89.9Ω and 2kΩ are 0.0111Ʊs and 0.0005 Ʊs, respectively. The phasor equivalent circuit constructed using these values is shown in Fig. 7.6-14. Two nodes and corresponding node voltage phasors and the ground node are also marked.

Fig. 7.6-14 The phasor equivalent circuit at 1 mhz for the circuit in Fig. 7.6-12

The node equation at first node is:

We note that the controlling voltage phasor Vx is same as the node voltage phasor V1. Therefore, the node equation at second node is:

We need to solve for only V2. Substituting for V1 in terms of V2 as determined from Eqn. 7.6-2 in Eqn. 7.6-1 yields the solution for V2.

Solving for V2, we get, V2 = (–108.5 + j62.7) Vm V.

Therefore, gain at 1 MHz = (–108.5 + j62.7) = –(108.5 – j62.7) = – 125.3∠–30°. We express the gain this way since this is an inverting amplifier and the overall negative sign accounts for that. Thus, the output sine wave of amplifier lags by 30° at 1 MHz compared to the output when input is at low frequencies of few 100’s of Hz.

7.7 CIRCUIT THEOREMS IN SINUSOIDAL STEADY-STATE ANALYSIS

Sinusoidal steady-state, as we have defined, is a concept relevant only for a linear dynamic circuit. A nonlinear circuit excited by a sinusoidal waveform may reach a steady-state; but that steady-state will not be a sinusoidal steady-state since the response of a nonlinear circuit to a sinusoidal waveform may contain distorted and non-sinusoidal content. Phasors and phasor equivalent circuits are applicable only if all response variables are sinusoidal waveforms with frequency same as that of input, i.e., only if the dynamic circuit is linear. Thus, when a phasor equivalent circuit is mentioned, linearity of the time-domain circuit is implied.

All the circuit theorems we developed in Chapter 5, except the maximum power transfer theorem, are applicable to phasor equivalent circuits used to solve for sinusoidal steady-state variables in a linear dynamic circuit excited by sinusoidal sources with a common frequency. Thus we may use Source Transformation Theorem, Superposition Theorem, Compensation Theorem, Thevenin’s Theorem, Norton’s Theorem and Reciprocity Theorem in phasor equivalent circuits. The maximum power transfer theorem needs some modification.

7.7.1 Maximum Power Transfer Theorem for Sinusoidal Steady-State Condition

Figure 7.7-1 shows a linear dynamic circuit containing one or more independent sinusoidal sources with a common frequency delivering power to a load circuit which is also under sinusoidal steady-state. It is assumed that the constraints required for applying Thevenin’s theorem are satisfied by the entire circuit – that is the circuit in Fig 7.7-1 (a) and (b) have unique solution and there is no interaction between the delivery circuit and load circuit other than through the common terminals. Then we can replace the power delivery circuit by its Thevenin’s equivalent comprising an open-circuit voltage in series with the Thevenin’s equivalent impedance RS + jXS. The load voltage and current phasors are identified.

Fig. 7.7-1 (a) The power transfer context (b) The power delivery circuit replaced by its thevenin’s equivalent

We can assume with no loss of generality that the angle of Voc phasor is zero, i.e.,Voc = Vocm∠0°. Let I = Imϕ and Z = Z ∠θ= RS+ jXS. Therefore, RS = Ζ cosθ and XS = Ζ sinθ. The load voltage phasor V = VocZI = VocmZIm∠(ϕ + θ)

Then, we may write the following time-domain expressions under sinusoidal steady-state condition.

The average power delivered to the load circuit is the cycle average of v(t)× i(t).

 

 

Hence the average power delivered to the load PL = 0.5VocmIm cosϕ – 0.5ZIm2 cosθ PL.

We want to maximize this. But PL is a function of Im and ϕ since both of them will be influenced by the load circuit. Therefore, we set the partial derivatives of PL with respect to Im and ϕ to zero.

Second equation leads toϕ = 0 and with this value of ϕ, the first equation leads to But Ζ cosθ = RS. Therefore, Im = Vocm/2RS .

The condition ϕ = 0 implies that the circuit has to be resistive for maximum power transfer to take place. Therefore, the effective reactance of the load at its terminals must be –XS such that it will cancel the Thevenin’s reactance of the power delivery circuit and make the entire circuit resistive. Moreover, the condition that Im = Vocm/2RS implies that the effective resistance at the load terminals must be RS such that the entire circuit becomes a resistor of 2RS in series with Voc. We now state the Maximum power transfer theorem for circuits in sinusoidal steady-state.

 

Maximum average power is transferred to a load circuit from a power delivery circuit under sinusoidal steady-state when the driving-point impedance ZL = RL + jXL of the load is the conjugate of Thevenin’s impedance ZS = RS + jXS of the power delivery circuit. Therefore RL = RS and XL = – XS are the required conditions. The maximum average power transferred under this condition will be

Example: 7.7-1

(i) Find the Thevenin’s equivalent across a–b in the circuit in Fig. 7.7-2. (ii) ind the voltage across a 500Ω connected across a–b. (iii) Find the value of capacitive reactance to be connected across a–b if the magnitude of voltage across the 500Ω load is to be raised to 132kV rms. (iv) If a–b gets shorted what is the current that flows through the short?

Fig. 7.7-2 Circuit for Example 7.7-1

Solution

  1. We use superposition principle to obtain the Voc phasor.

    The Thevenin’s equivalent circuit for sinusoidal steady-state is shown as the circuit in Fig. 7.7-3 (a)

    Fig. 7.7-3 (a) Thevenin’s equivalent circuit for the circuit in Fig. 7.7-2. (b) With 500 ω load

  2.  The voltage phasor across the load of 500 Ω
  3.  We first determine a new Thevenin’s equivalent of the circuit in Fig. 7.7-3 (b) for further load connection across a–b. This equivalent circuit will have an open-circuit voltage phasor = 126.77∠4.84° kV rms and Thevenin’s equivalent impedance = (0.857 + j5.143)//500 = 0.908 + j5.125 Ω. Let –jXC be the capacitive reactance connected now across the output of this new equivalent circuit. The magnitude of voltage phasor across the capacitor has to be 132 kV rms.

    There are two solutions for XC. They are 2.7 Ω and 129.1 Ω. The higher value is accepted. (Why?).

    Therefore, the required reactance is –129.1Ω and the required capacitive reactance is 129.1Ω. Once we qualify a reactance by using capacitive we do not have to include the negative sign.

  4. The short-circuit current at a–b is = 126.77∠4.84° ÷ (0.908 +j 5.125) = 126.77∠4.84° ÷5.205∠–80° = 6.26 –j23.54 kA rms = 24.36∠–75.16° kA rms.

Example: 7.7-2

Two terminals a and b are identified as output terminals of a linear circuit containing sinusoidal sources at a common frequency. The open-circuit voltage measured across a–b is seen to be 100 V rms. The voltage phasor across a–b goes down to 63.25 V rms when a 20 Ω resistor is connected at the output and it goes down to 44.71 V rms when a 10 Ω resistor is connected at the output. (i) Find the resistive load that will draw maximum average power from this circuit if a reactance can be introduced in series with the resistive load and can be varied to maximize the power. (ii) Find the resistive load that will draw maximum average power for this circuit if no reactance can be added in series with it.

Solution

We have to find the Thevenin’s equivalent of the circuit with respect to a–b first. Let the Thevenin’s equivalent impedance be R + jX Ω.

Then the magnitude of voltage phasor across a–b when a resistor RL is connected across the terminals

|Voc| is given as 100 V rms. Also known are the rms output voltage values when RL = 10 Ω and Rl = 20 Ω. Substituting the numerical values, we get the following two equations in two unknowns, R and X.

Squaring both sides of equations and carrying out the required algebraic manipulation, we get, (20 + R)2 + X2 = 999.86 and (10 + R)2 + X2 = 500.25. Subtracting the second equation from the first yields

(20 + R)2 – (10 + R)2 + X2 = 499.61, i.e., (30 + 2R)×10 = 499.61 ⇒ R = 9.98Ω ≈ 10Ω. Using the value of R = 10 Ω in (10 + R)2 + X2 = 500.25 we get X =10.01 ≈10 Ω.

Thus the Thevenin s equivalent of the circuit is 1000° V rms in series with (10 + j10) Ω.

  1. If a reactance can be put in series with the load resistance and the value of reactance and resistance can be independently adjusted, then, maximum power transfer will take place under conjugate impedance matching condition. Therefore, RL must be 10 Ω and XL must be –j10 Ω for maximum average power transfer to load. The maximum power transferred under this condition will be = R(Voc/2R)2= Voc2/4R W where Voc is the rms open-circuit voltage. Therefore, the power transferred to (10–j10) Ω is 250 W.
  2.  The condition for maximum power transfer has to be derived for this case. Let RL be the load resistance. Then the current phasor and rms value (i.e., magnitude of the phasor, assuming Voc is the rms open-circuit voltage) of current is Power in Value of RL for maximizing this quantity is found by equating its derivative with respect to RL to zero.

Thus, maximum power transfer takes place in a pure resistive load when load resistance is equal to magnitude of Thevenin’s equivalent impedance of the power delivery circuit. The required load resistance in this example is and the power transferred is =

7.8 PHASOR DIAGRAMS

We have understood a phasor as a complex amplitude of a complex exponential function that varies in time as per ejωt till now. We lend a little more color to phasors in this section. We are motivated by uniform circular motion that is a part of school Physics. We take up a time-domain signal vS(t) = Vmcosωt u(t) represented by a phasor VS = Vm∠0° and arrive at a geometric interpretation for the phasor.

Concept No. 1 – Consider a line of length Vm with an arrow at the end (instead of a stone at the end of a taut string) rotating at a constant angular velocity of ω rad/sec in the counter-clockwise direction. Let the coordinates of arrow-tip be represented as x(t) and y(t) in the horizontal and vertical directions in a right-handed Cartesian coordinate system as shown in (a) of Fig. 7.8-1.

Fig. 7.8-1 (a) A rotating line of length Vm in x–y coordinate system (b) A time-varying complex number in complex plane representing a complex signal constructed using coordinates of arrow-tip in (a)

Assume that the line was collinear with x-axis at t = 0 and then started rotating at ω rad/sec in the direction shown. Then, the angular position of the line in space is given by ωt radians measured in counter-clockwise direction from positive x-axis. The projection of the arrow-tip on the x-axis will then be Vmcosωt and the projection of the arrow-tip on the y-axis will be Vmsinωt. Therefore, the signal we started with can be given a geometric interpretation of horizontal projection of arrow-tip of a line of length Vm rotating in counter-clockwise direction with a constant angular velocity of ω rad/s, starting from x-axis position at t = 0.

Concept No. 2 – Projections on both axes are functions of time. We define a composite function by using these two projection functions. We define a complex function of time v(t) = [x(t) + j y(t)] u(t) by treating the horizontal projection as the real part of a complex number and the vertical projection as the imaginary part of the same complex number. This complex number can be represented as a point in a complex plane. As the line progresses in its rotation, the value of complex number, constructed as explained, too will change. Therefore, the point representing this number in the complex plane also will change with time. A complex number can be geometrically represented by a line with one end at origin and with an arrow at the other end in the complex plane. When the complex number changes with time, the arrow-tip of line representing the number in complex plane will trace out a path in that plane. It must be evident in this case that when the rotating line moves in (a), the corresponding path traced out by the complex number in the complex plane in (b) will also be a circle of radius Vm and the arrow-tip will traverse this path with a constant angular velocity of ω rad/sec.

Thus, a complex signal v(t) = Vm (cosωt + j sinωt)u(t) = Vm ejωt u(t) constructed from coordinates of arrow-tip of a uniformly rotating line in space will be represented geometrically in the ‘complex signal plane’ by a directed line of length Vm rotating uniformly, starting from real axis, in the plane. The values read on the axes of ‘complex signal plane’ at any instant t are the real and imaginary components of the complex number representing the signal value at that instant.

Concept No. 3 – Let vS(t) = Vm cos(ωt + θ) u(t) . Now the arrow-tip of rotating line in (a) of Fig. 7.8-1 (a) will start at (Vm cosθ, Vm sinθ) i.e., at an angular position of θ at t = 0 and will start rotating at ω rad/sec from there. Therefore, its angular position at t = t will be (ωt + θ). The corresponding complex signal Vm ej(ωt + θ) u(t) positions in complex signal plane are marked in Fig. 7.8-2 for t = 0 and t = t.

Fig. 7.8-2 Signal positions for Vm ej(ωt + θ) (a) At t = 0 (b) At t = t

Concept No. 4 – Consider two signals vS(t) = Vm cos(ωt + θv) and iS(t) = Im cos(ωt + θi) with same angular frequency. Their representations in complex signal plane at t = 0 and at t = t are shown in Fig. 7.8-3 (a) and (b).

Fig. 7.8-3 Signal positions of two complex exponential functions at (a) t = 0 (b) t = t

The directed lines of different lengths do change their angular positions with time; but they maintain a constant angular difference at all t. This constant angular difference is the value of angular difference they had at t = 0.

Therefore, a set a complex exponential signals, all with same angular frequency but with different initial angular positions, will maintain their relative positions with respect to each other as they rotate in counter-clockwise direction with a constant angular velocity of ω rad/sec. Such a set of signals with same angular frequency form a coherent group and always stays together with their relative positions unchanging.

Concept No. 5 – Thus rotation aspect is common to all signals at the same angular frequency. That is a piece of information that we can supply at any time and does not have to be carried always in the diagram. What we are usually interested in is the relative phase angles between members of a coherent group of complex exponential signals. Therefore, we may suppress the rotation of lines representing complex exponential signals in the complex signal plane – i.e., we may freeze the lines at their position at t = 0. This ‘freezing’ the signal lines at their initial position converts complex time-functions into complex numbers – i.e., constant-valued signals in complex signal plane. These constant-valued signals in complex signal plane are our phasors.

Thus going from phasor to time-function involves ‘unfreezing’ the directed lines in complex signal plane, allowing them to rotate in counter-clockwise direction at a constant angular velocity of ω rad/ sec and extracting the horizontal projection of line end-points, i.e., extracting their real parts.

Concept No. 6 A diagram depicting a group of coherent (i.e., of same angular frequency) complex exponential signals frozen at their initial position is called a phasor diagram. Angles measured in counter-clockwise direction in a phasor diagram are lead angles and angles measured in clockwise direction in a phasor diagram are lag angles

Phasor diagram shows the magnitude of phasors as the length of directed arrows to some scale and angle of phasors as angles measured from a reference phasor in counter-clockwise direction. The reference phasor is aligned along the horizontal direction. Since only the relative positions of various phasors in a circuit really matter, any one phasor may be taken as reference phasor and the directions of all other phasors may be marked with respect to this reference phasor provided the absolute phase of reference phasor preserved for later use. This amount to stating that a group of directed lines originating from origin may be rotated as a whole to a new position without affecting the relative positions among the members of the group.

Concept No. 7 – Multiplying a phasor by j or ej90° or 1∠90° amounts to rotating it by 90° in the counter-clockwise direction in the phasor diagram. This amounts to converting a cosωt to cos(ωt + 90°) = –sinωt in time-domain and hence is equivalent to introducing a phase lead of 90°. Multiplying a phasor by –j or ej90° or 1∠–90° amounts to rotating it by 90° in the clockwise direction in the phasor diagram. This amounts to converting a cosωt to cos(ωt – 90°) = sinωt in time-domain and hence is equivalent to introducing a phase lag of 90°.

Concept No. 8 – Phasors in a phasor diagram can be added and subtracted by employing parallelogram law of addition of complex numbers in complex plane. This law is same as the law of addition of vectors in space coordinates.

Phasors are complex amplitudes used to represent sinusoidal quantities under sinusoidal steady-state condition. There should be only one value of angular frequency in the circuit. All sinusoidal sources must be at the same frequency. Therefore, a phasor diagram can be drawn only for a circuit that is in sinusoidal steady-state under the influence of one or more sinusoidal sources at same angular frequency. If there are different frequency sinusoids present in the same circuit, different phasor diagrams – one each for each frequency – should be drawn. The phasor solution arrived at from different phasor diagrams will have to be transformed into time-domain quantities using relevant angular frequency values before combining the solutions by invoking Superposition Theorem.

Example: 7.8-1

Draw the phasor diagram showing all voltage phasors and current phasors for a series RL circuit with R = 6 Ω, X = 8 Ω at 50 Hz and vS(t) = 20 cos100πt V.

Solution

The impedance of the circuit, Z = (6 + j8)Ω = 10∠53.13° Ω. Applied voltage phasor VS = 20∠0° V. The circuit current phasor I = 20∠0° V ÷10∠53.13° Ω = 2 ∠–53.13° A.

Voltage phasor across resistor VR = 6 Ω ×2 ∠–53.13° A = 12 ∠–53.13° V. Voltage phasor across inductor VL = j8 Ω ×2 ∠–53.13° A =16 ∠36.87° V.

We choose the applied voltage phasor as the reference phasor and align it along horizontal direction. Different scaling for voltage phasor magnitudes and current phasor magnitudes will have to be employed when a phasor diagram shows voltage phasors and current phasors together.

The circuit and phasor diagrams are shown in Fig. 7.8-4.

Fig. 7.8-4 An RL circuit and its phasor diagram

Note that VL and VR add to form VS by parallelogram law of addition. The inductor voltage is seen to lead the circuit current by 90° and current lags the applied voltage by the impedance angle equal to 53.13°.

Example: 7.8-2

Draw the phasor diagram showing all voltage phasors and current phasors for a series RC circuit with R = 6 Ω, X = –8 Ω at 50 Hz and vS(t) = 20 cos100πt V.

Solution

The impedance of the circuit, Z = (6–j8)Ω = 10∠–53.13° Ω. Applied voltage phasor VS = 20∠0°. The circuit current phasor I = 20∠0° V ÷10∠–53.13° Ω = 2 ∠53.13° A. Voltage phasor across resistor VR = 6 Ω ×2 ∠–53.13° A = 12 ∠53.13° V. Voltage phasor across inductor VL = –j8 Ω ×2 ∠53.13° A =16 ∠–36.87° V. We choose the applied voltage phasor as the reference phasor and align it along horizontal direction. The circuit and phasor diagrams are shown in Fig. 7.8-5.

Fig. 7.8-5 The RC circuit and its phasor diagram

Example: 7.8-3

A series RLC circuit is excited by a voltage source vS(t) = 100cosωt u(t) V. The inductive reactance at ω is 10Ω and capacitive reactance at ω is 10 Ω. The resistor has 1Ω value. Draw the phasor diagram of the circuit under sinusoidal steady-state condition.

Solution

The impedance of the circuit at ω rad/s Z = 10 + j10–j10 = 10∠0° Ω

Applied voltage phasor, VS = 100∠0° V

∴ Circuit current phasor, I = 100∠0° A

∴Voltage phasor across R, VR = 100∠0° V

∴ Voltage phasor across L, VL=j10 Ω × 100∠0° A = 1000∠90° V

∴Voltage phasor across C, VL = –j10 Ω × 100∠0° A = 1000∠–90° V

Fig. 7.8-6 A RLC circuit and its phasor diagram

Note that the voltage across capacitor and inductor are in phase opposition. Therefore, they cancel each other completely, thereby leaving the entire supply voltage to the resistor. Hence, the current under this condition is the maximum current that the circuit can have with given amplitude of applied voltage. This happens because the impedance of capacitor and inductor are equal in magnitude and opposite in sign. They cancel out, making the impedance of the circuit a minimum of R at this frequency. This is the resonance condition in a series RLC circuit.

Example: 7.8-4

A sinusoidal current source iS(t) = 5cos(100πt – 45°) A is applied across a parallel combination of an inductor , a resistor and a capacitor. Find the steady-state currents in elements and voltage across the combination using phasor diagram. The resistance value is 6 Ω and the values of reactance of inductor and capacitor at ω= 100π rad/sec are 8 Ω and – 4 Ω respectively.

Solution

This example calls for use of phasor diagram to solve the circuit under sinusoidal steady-state. Hence the phasor quantities are unknown when we draw the phasor diagram. In this kind of a situation, the phasor that we choose as reference phasor has to have the property that all the other phasors in the circuit can be worked out from this phasor employing KCL, KVL and element relationship. Applied voltage or current will not be suitable for this purpose. It has to be one of the response variables. But, if it is one of the response variables, its magnitude will be unknown and hence we cannot fix the scale in phasor diagram. Thus, the phasor diagram is drawn by assigning an arbitrary, but known, length to the phasor that is chosen as the reference phasor. The scale in the diagram will emerge from the known applied voltage or current phasor once the diagram is completed according to KCL, KVL and element relationships.

We choose the current in the resistor as the reference phasor in this example. The circuit and phasor diagrams are shown in Fig. 7.8-7.

Fig. 7.8-7 Circuit and phasor diagram in Example 7.8-4

We have set IR in the horizontal direction. This does not mean that iR(t) will be a cos100πt wave. Once we solve the phasor diagram completely, the source current phasor will come out with some angle other than its actual angle of –45°. Then we will rotate the entire phasor diagram such that IS takes up –45° position in the diagram. The other phasors will then take up suitably shifted positions. The new angular positions can be calculated from the known angular position of IS and apparent angular position of IS in the diagram shown in Fig. 7.8-7.

Let d be the length that we used to represent IR. Then the current through the capacitor IC = RIR/jXC will have a magnitude of 6/4 = 1.5 times that of IR and hence needs a line of length 1.5d in 90° position in the diagram. The current through inductor IL = RIR/jXL will have a magnitude of 6/8 = 0.75 times that of IR and hence needs a line of length 0.75d in –90° position in the diagram. Moving a copy of IL to the tip of IC takes us to (IC + IL) and placing a copy of IR at the tip of (IC + IL) takes us to the tip of IS phasor. Thus we complete the diagram. Now, we either measure the length of IS phasor or calculate it as from the geometry of the figure. But this must be equal to 5 A since the amplitude of iS(t) is stated to be 5 A. Therefore, a length of d stands for 5/1.25 = 4 A. Therefore magnitude of IR is 4 A, of IC is 6 A and of IL is 3 A.

The angle of IS phasor in the phasor diagram is tan–1(0.75) = 36.9°. But we know that actual angle of IS phasor is – 45°. Therefore, angle of –(45° + 36.9°) = – 81.9° will have to be added to all phasors in the diagram.

IS = 5∠–45° A , IR = 4∠–81.9° A ,IC = 6∠8.1° A and IL = 3∠–171.9° A and V = 24∠–81.9° V is the phasor solution of the circuit.

Corresponding time-domain functions are:

iS(t) = 5 cos (100πt – 45°) A, iR(t) = 4 cos (100πt – 81.9°) A, iC(t) = 6 cos (100πt + 8.1°) A, iL(t) = 3 cos(100πt – 171.9°) A and v(t) = 24 cos (100πt – 81.9°) V.

We could have used IC or IL or V as the reference phasor and developed the phasor diagram to arrive at the same solution. However, we could not have used IS as the reference phasor since we wold not have been able to proceed any further with that choice.

Example: 7.8-5

Two impedances Z1 = 6 + j8 Ω and Z2 = 8–j6 Ω are in parallel and the whole combination is in series with a third impedance Z3 = 5 + j5 Ω. The circuit is driven by a sinusoidal voltage source vS(t) = 50 sin 100πt V. Solve the circuit by phasor diagram method.

Solution

The circuit and phasor diagrams are shown in Fig. 7.8-8.

Fig. 7.8-8 Circuit and phasor diagram for Example 7.8-5

We choose the current phasor I as the reference phasor.

The impedance values are converted to polar form as Zl = 10∠5 3.1° Ω, Z2 = 10∠–36.9° Ω and Z3 = 7.07∠45° Ω. The parallel combination, Z1//Z2 is = 7 + j1 Ω = 7.07 ∠ 8.1° Ω.

We use a length d for I. Then, the length to be used for I1 and I2 are 0.707d and they are oriented at –45° and 45° respectively. Next we draw the V = 7.07∠8.1° I phasor at 8.1° with respect to horizontal and use a convenient length d1 if the length 7.07d is not suitable. The V3 phasor is also of the same length since V3 = Z3 I = 7.07∠45° I. But it is to be drawn at 45° position.

The phasors V and V3 on addition as per parallelogram law should result in VS. The length of VS must be 2 × d1 × cos [(45°–8.1°)/2] = 1.9 d1. But this length must stand for 50 V and hence d1 must stand for 26.3 V. Therefore, magnitudes of V and V3 are 26.3 V. Since I = V3/Z3 , magnitude of I will be 3.72 A. Now, magnitudes of I1 and I2 are 0.707 times the magnitude of I. Hence they are of 2.63 A magnitude.

The angle of VS as per the phasor diagram is 8.1° + (45°–8.1°)/2 = 26.55°. But since vS(t) = 50 sin100πt, the actual phase angle of VS is –90° with respect standard cosine wave. Therefore, an angle of –116.55° has to be added to the angle of all phasors in the phasor diagram shown in Fig. 7.8-8.

Therefore, the sinusoidal steady-state solution of the circuit is obtained as:

VS = 50∠–90°, and,

V = 26.3∠–108.45° V and V3 = 26.3 ∠–71.55° V.

I = 3.72 ∠–116.55° A, I1 = 2.63 ∠–151.55° A, I2 = 2.63 ∠–71.55° A

The time-domain functions are:

vS(t) = 50 cos(100πt – 90°) = 50 sin100πt V

v(t) = 26.3 cos(100πt – 108.45°) = 26.3 sin(100πt – 18.45°) V

v3(t)= 26.3 cos(100πt – 71.55°) = 26.3 sin(100πt + 18.45°) A

i(t) = 3.72 cos(100πt – 116.55°) = 3.72 sin(100πt – 26.55°) A

i1(t) = 2.63 cos(100πt – 151.55°) = 2.63 sin(100πt – 61.55°) A

i2(t) = 2.63 cos(100πt – 71.55°) = 2.63 sin(100πt + 18.45°) A

Example: 7.8-6

Three sinusoidal voltage sources – v1(t), v2(t) and v3(t) – with angular frequency of 100πrad/sec and amplitudes of 63 V, 52 V and 25 V, respectively, are connected in series along with a 10 Ω resistor to form a closed loop. The voltage sources are connected in such a way that they aid each other in the loop. The current in 10 Ω resistor is found to be zero. Find v1(t), v2(t) and v3(t).

Solution

The statement of the problem makes it clear that v1(t) + v2(t) + v3(t) = 0. Therefore, the phasor diagram of the three voltage phasors will form a closed triangle. The phasor diagram is shown in Fig. 7.8-9.

The phasor diagram is drawn as follows. Choose a suitable scale and draw the line OP to represent magnitude of V1. With O as centre, draw a circle of radius 52 to scale. Draw another circle of radius 25 to scale with P as its centre. Let the two circles intersect at Q. They will intersect; otherwise the three voltages would not have added up to zero. Join QO and PQ. Create a copy of QO and move it to form V2. Similarly, create a copy of PQ and move it in parallel such that the non-arrow end comes to O to form V3.

Fig. 7.8-9. Phasor diagram in Example 7.8.6

Now ∠A and ∠B can be measured from the diagram. Then V1 = 63∠0° , V2 = 52∠–(180–A)° and V3 = 25∠(180–B)°.

The angles ∠A and ∠B can also be calculated by Law of Cosines.

252 = 632 + 522 – 2 × 63 × 52 × cosA A = 22.62°

522 = 632 + 252 – 2 × 63 × 25 × cosB B = 53.13°

V1 = 63∠0° V, V2 = 52∠–157.38° V and V3 = 25∠126.87° V.

v1(t) = 63 cos100πt V, v2(t) = 52 cos(100πt – 157.4°) V and v3(t) = 25 cos(100πt + 126.9°) V.

7.9 APPARENT POWER, ACTIVE POWER, REACTIVE POWER AND POWER FACTOR

Consider a sinusoidal voltage source v(t) = Vm cosωt delivering power to a resistive load R. The current in the resistor is i(t) = Im cosωt where Im = Vm/R.

The instantaneous power is p(t) = VmIm cos2ωt = 0.5 VmIm + 0.5 VmIm cos2ωt W. The first term is a constant and the second term produces an average of zero over a cycle. Therefore, the average power delivered to resistor is 0.5 VmIm = 0.5 Vm2/R = 0.5 Im2R. The average power can be expressed as VrmsIrms in terms of rms values of voltage and current. Thus, a sinusoidal voltage/current is only as effective as a DC voltage /current of magnitude that is only 70.7% of the amplitude of the sinusoid. The presence of the second term – the term that has as much strength as the average power; but is oscillating at twice the supply frequency – indicates this relative inefficiency of sinusoids compared to DC quantities in carrying power to a load. This is the inevitable price that we have to pay for having opted for sinusoidal waveforms. Hence, we do not complain about the inevitable double-frequency power pulsation that has as much amplitude as the average power that is being delivered to the load.

Now, consider the same voltage source delivering power to the same resistor, but the resistor is in parallel with an inductor of reactance X at ω rad/s as shown in Fig. 7.9-1.

Fig. 7.9-1 A parallel RL load and its phasor diagram

Such a load is called a reactive load. The load impedance now is given by

The current delivered by the voltage source will be

The instantaneous power is

p(t) = VmImcosωt cos(ωt θ)

       = Vm(Imcosθ) cos2ωt + Vm(Imsinθ) sinωt cosωt

       = {[0.5Vm(Im cosθ)] + [0.5Vm(Im cosθ)] cos2ωt]} + [0.5 Vm(Imsinθ)] sin2ωt

The average power is

Thus, Im cosθ = Vm/R is the same as the current drawn by the resistor alone.

Thus, average power is due to the current drawn by resistor and is the same as before. However, the source has to deliver a higher current to deliver the same amount of power now. The first double-frequency power pulsation (i.e., the cos2ωt term in p(t)) is the expected double-frequency pulsation when an average power is being delivered. The second double-frequency pulsating power (i.e., the sin2ωt term) is solely due to the inductor in parallel with resistor – i.e., due to the reactive nature of load) and has an amplitude of The presence of the second pulsating power term with non-zero amplitude is an indicator to the fact that the magnitude of current is more than the minimum magnitude of current required to pass on the average power to the load. The minimum current that is required in the circuit to deliver the average power it is delivering now is only cosθ times the present current.

If the voltage in a DC circuit is same as Vrms of this sinusoidal voltage source and the current in the DC circuit is same as the Irms in this AC circuit, then, the DC source would have delivered VrmsIrms watts of average power to the load. Compared to that, the AC circuit delivers only cosθ times this power. Thus, effectiveness of utilisation of voltage and current in a reactive circuit under sinusoidal steady-state is compromised by the factor cosθ compared to a DC circuit carrying similar voltage and current. This observation leads to a definition of apparent power in an AC circuit.

 

Apparent power carried by a sinusoidal voltage of rms value Vrms and a sinusoidal current of rms value Irms is defined as the actual power that will be carried by a DC voltage of same effective value and a DC current of same effective value –i.e., Apparent Power = VrmsIrms.

Since the average power in an AC circuit can be different by a factor cosθ, where θ is the angle between voltage phasor and current phasor, the unit of watts is reserved for average power and a unit of Volt-Ampere (VA) is assigned to apparent power. Since only the average power contained in the apparent power is active in generating useful output from the circuit, average power is called active power. The ratio between the active power and apparent power is called the power factor of the circuit.

 

Apparent Power = VrmsIrms VA

Active Power, P = Average Power = VrmsIrmscosθ W, where θ is the angle by which the voltage phasor leads the current phasor.

Note that the definitions of apparent power, active power and power factor are applicable for any general periodic waveform context. But the expressions, VrmsIrms cosθ for active power and cos θ for power factor, are applicable only under sinusoidal steady-state condition.

7.9.1 Active and Reactive Components of Current Phasor

Im cosθ is the amplitude of cosωt term in current and Imsinθ is the amplitude of sinωt term in current. cosωt and sinωt terms are represented by phasors that have 90° between them. They are called quadrature components for this reason. Thus, Im cosθ is the in-phase component in current phasor and Ιmsinθ is the quadrature component in current phasor with respect to the voltage phasor. Imcosθ, the in-phase component, carries the average power (along with an unavoidable double-frequency pulsating power of equal amplitude), and, Imsinθ, the quadrature component, produces a pure double-frequency pulsating power term with zero average content. This pulsating power term is avoidable by making θ = 0 – i.e., by making the load purely resistive.

Any current phasor can be resolved into two components – one in the direction of voltage phasor and one in a direction perpendicular to the voltage phasor. The component in the direction of voltage phasor is the in-phase component and this component will carry active power. Therefore, this component is called active component of current and is denoted by a phasor Ia.. The component in the perpendicular direction to voltage phasor is the quadrature component and this component will not carry any average power. This component is decided by the reactance in the circuit and goes to zero when the circuit is purely resistive. Hence this component is called the reactive component of current and is denoted by a phasor Ir.. The current phasor I is the phasor sum of Ia and Ir. This is shown in the phasor diagram in Fig. 7.9-1.

Note that the definition of active and reactive components of a current phasor is based on projecting the current phasor along and perpendicular to voltage phasor and is applicable to any current phasor. In the circuit we considered in Fig. 7.9-1, the active component of I could be identified as the current in R and the reactive component could be identified as the current in jX. However, such an identification of active and reactive current components of a given current phasor is not a precondition for their definition. Consider a series RL load and its phasor diagram in Fig. 7.9-2.

Fig. 7.9-2 A series RL load and its phasor diagram

The current phasor I can be resolved into in-phase component Ia and quadrature component Ir with respect to voltage phasor as shown in the phasor diagram in Fig. 7.9-2. However, we cannot identify these components as real currents flowing in any element since there is only one current in a series circuit and that is I. However, we observe that the voltage phasor also can be resolved into two components – one along the current phasor direction and one in a perpendicular direction. These are the active component and reactive component of voltage phasor.

We can always think of a parallel-connected resistance and reactance that has same impedance as that of a series connected resistance and reactance at a particular frequency. Then, we can identify the active component of I in a series circuit as the current that will flow in the resistor of a parallel circuit that has same impedance as that of the series circuit. Similarly, we can identify the reactive component of I in a series circuit as the current that will flow in the reactance of a parallel circuit that has same impedance as that of the series circuit. Hence, though resolving voltage phasor along current phasor and resolving current phasor along voltage phasor have the same effect in power equations, we choose to use the quadrature components of current phasor rather than voltage phasor in subsequent discussion.

Ia is in phase (or with 180° phase) with voltage phasor by definition and hence its phase is known. Therefore, it is a common practice to refer to Ia as if it is a real number with positive or negative sign. In the case of Ir, it can be specified as a real number with positive or negative sign. Or else, one may add the qualifiers ‘capacitive’ or ‘inductive’ and then skip the sign. The j in Ir is taken to be implied by the word ‘reactive’ in ‘reactive component’. Thus, if VS = Vm∠0° and I = Im∠–θ then, active component of current is Imcosθ (IrmscosθA rms) and reactive component of current is –Imsinθ(–IrmssinθA rms). If the negative sign is skipped, then we have to state that inductive component of current is Imsinθ(Irmssinθ A rms). For instance, a 5 A reactive current implies 5 A of a capacitive current, a –5 A reactive current implies 5 A of an inductive current, a 5 A inductive current implies 5 A of an inductive current and a –5 A inductive current implies 5 A of capacitive current. Similarly a 5 A capacitive current implies 5 A of a capacitive current and –5 A capacitive current implies 5 A of an inductive current. Inductive current component lags voltage phasor by 90° and capacitive current component leads voltage phasor by 90°.

7.9.2 Reactive Power and the Power Triangle

We restate the concepts we developed in Section 7.9-1 before we continue with the concept of reactive power that tends to be a confusing one to beginners in Electrical Engineering.

 

  • Let v(t) = Vmcosωt V and i(t) = Im cos(ωt θ) A be the steady-state voltage and current at a pair of load terminals as per passive sign convention. Then apparent power which is the power that a DC circuit with same effective values of voltage and current would have delivered is Vrms Irms = 0.5 VmIm VA. The average power which is also called active power is P = Vrms Irmscosθ W = 0.5 VmIm cosθ W. The power factor of the circuit which is defined as the ratio of active power to apparent power is cosθ.
  • The minimum magnitude of current required to deliver a given amount of power P is given by Irms = P/Vrms with cosθ = 1. This happens when the driving-point impedance of the load at ω rad/sec is effectively a resistance. The circuit has θ = 0 then, and, draws power at unity power factor with minimum magnitude of current.
  • Reactive component in the driving-point impedance of the load circuit makes θ non-zero and increases the current magnitude for a given amount of active power. Thus current is underutilized as far as active power delivery is considered. The power factor of the circuit will be less than unity.
  • The current phasor can be resolved into active component (= Irms cosθ A rms) and reactive component (= –Irms sinθ A rms) by finding its projection along voltage phasor and along a perpendicular to voltage phasor respectively. The active component may be thought of as the current drawn by the resistor in a parallel connected resistance-reactance combination that has same impedance as that of the load circuit. The reactive component of current is the current drawn by the reactance in that equivalent parallel circuit. The active current component carries the entire active power.

The utilisation of load current in its role as a vehicle to carry active power can be judged from the relative proportion of its active and reactive current components. It can be shown easily that and where Ia,rms and Ir,rms indicate the rms values of the components, whereas Iam and Irm indicate their amplitudes. The following relations also hold between various quantities.

Ir,rms and Irm contain the sign of reactive component. Therefore, while power factor is always positive, sinθ and tanθ are positive for a lagging load and negative for a leading load. Note that θ is the angle by which voltage phasor leads the current phasor. Power factor of a load is independent of sign of θ and hence a qualifier lag or lead is to be appended to the number representing power factor to distinguish between positive and negative values of θ. Thus, if θ = 45°, the power factor is ‘0.7 lag’ and if θ is –45° the power factor is ‘0.7 lead’.

Another method to describe the utilisation of load current in carrying active power will be to compare the active and reactive rms components of current after scaling the active rms current component by + Vrms and reactive rms current component by –Vrms. But then, if the active component of current is multiplied by + Vrms , the result is active power. Then, it will be tempting to call the product of the reactive component of current multiplied byVrms a power – but not a real average power, since this component of current produces only VrmsIr,rms sin2ωt term in instantaneous power. Electrical Engineers yielded to this temptation long back and they called it reactive power in contrast to active power. Thus reactive power is not a power at all; it is only a power-like measure of reactive component of current.

 

To state that there is some reactive power flow into a load is a disguised way of stating that (i) the load impedance has a reactive component (ii) the load current has a reactive component which reduces the efficacy of current in carrying active power (iii) therefore, the current magnitude is more than the minimum magnitude needed that is commensurate with actual power transfer taking place (iv) therefore, circuit is operating at a power factor less than unity.

This ‘fictitious power’ that is not a power at all in the normal sense of that word, is, in essence, a stand-in for the reactive component of current. It is usually denoted by Q and its unit is Volt-Ampere-reactive, shortened as VAr . Thus, Q = VrmsIrms sinθVAr where θ is the phase angle by which the voltage phasor leads the current phasor. Therefore, the reactive power consumed by an inductive load is positive in sign and the reactive power consumed by a capacitive load is negative in sign by definition.

Notice that the Q value is the same as the amplitude of double-frequency power pulsation caused by reactive component of current.

 

Note carefully that the sign of reactive component of current and reactive power carried by that current are opposite. Thus, an inductive load draws a ‘negative reactive current’ and consumes ‘positive reactive power’. A capacitive load draws ‘positive reactive current’ and consumes ‘negative reactive power’. This is matter of convention and convenience rather than of necessity.

If a circuit element is consuming a certain amount of reactive power, it may equivalently be thought of as delivering negative of that amount of reactive power. Thus an element that draws positive reactive power (i.e., inductive Q) can be said to deliver negative reactive power (i.e., capacitive Q). Similarly, an element that draws negative reactive power (i.e., capacitive Q) can be said to deliver positive reactive power (i.e., inductive Q). Thus, a capacitor is a source of inductive reactive power and an inductor is a source of capacitive reactive power.

One may easily show that (Apparent Power)2 = P2 + Q2. Thus, a closed triangle can be constructed by treating apparent power, active power and magnitude of reactive power as its sides – the triangle will be called, obviously, the power triangle. This fact is also expressed in alternative forms as (VA)2 = (W)2 + (VAr)2 or (kVA)2 = (kW)2 + (kVAr)2.

It may also be noted that active power is alternatively called real power and in-phase power. Similarly, reactive power is also called quadrature power.

Many expressions are commonly employed to calculate reactive power. The first expression is used when the load circuit is a composite circuit containing many resistive and reactive elements. If V = Vrms ϕv and I = Irmsϕi are the voltage phasor and current phasor at load terminals as per passive sign convention, then the Q delivered to the load circuit is VrmsIrms sin(ϕv ϕi) VAr. The other expressions are relevant when the voltage phasor and/or current phasor across a pure reactive element is known. In this case (ϕvϕi) is assured to be 90° if the element is an inductor and –90° if the element is a capacitor. Then, the reactive power delivered to that element, i.e., Q is given by

where Vrms is the rms value of voltage across the element, Irms is the rms value of current through the element and X is the reactance of that element. Note that reactance of an inductor is a positive value and that of a capacitor is a negative value.

7.10 COMPLEX POWER UNDER SINUSOIDAL STEADY-STATE CONDITION

Can we get these P and Q values from the voltage phasor and current phasor straightaway by multiplying them together? We will try. Let V = Vrmsϕν V rms be the voltage phasor and I = Irmsϕi A rms be the current phasor; both specified as rms quantities. Then, VI = VrmsIrms∠(ϕv + ϕi) = VrmsIrms cos(ϕv + ϕi) + jVrmsIrms sin(ϕv + ϕi).

We are not able to identify P or Q in the real and imaginary parts of this quantity since we know that P = VrmsIrms cos(ϕv ϕi) and Q = VrmsIrms sin(ϕνϕi), But this observation prompts us to try VI* instead of VI.

 

VI* = VrmsIrms∠(ϕvϕi) = Vrms Irms cos(ϕvϕi) + jVrms Irms sin(ϕv – ϕi) = P + jQ

 

Thus the quantity VI* contains the active power as its real part and the reactive power as its imaginary part.

This quantity, VI*, is defined as Complex Power and is denoted by S with unit of VA.

Therefore the magnitude of complex power is the apparent power and the angle of complex power is the angle by which the voltage phasor leads the current phasor. This angle is the same as the angle of driving-point impedance of the load circuit. S, P + j0 and 0 + jQ form a closed triangle in complex plane.

If the reader feels uncomfortable with the way the complex power was arrived at, let him be consoled by the fact that this was precisely how the expression for complex power was arrived at in the history of Electrical Engineering.

We had shown that both instantaneous power and average power are conserved in any circuit. Thus, active power under sinusoidal steady-state condition is a conserved quantity. That is, algebraic sum of active power delivered to all the elements of an isolated circuit under sinusoidal steady-state is zero. Does a similar conservation law hold for reactive power? It is possible to show that it does, by using the expression for instantaneous power under sinusoidal steady-state conditions. Since both real part and imaginary parts of S are conserved, S itself is a conserved quantity. That is, algebraic sum of complex powers in all elements of an isolated circuit will be zero.

for an isolated circuit under simusoidal steady-state.

Example: 7.10-1

Refer to Example: 7.6-4. Derive expressions for complex power delivered by the first source and complex power absorbed by the second source in a synchronous link and obtain approximate expressions for a situation when the phase difference between the sources is small and the difference in magnitude of voltages is small.

Solution

The synchronous link under consideration is shown in Fig. 7.10-1.

Fig. 7.10-1 A synchronous link

Let the current phasor from left to right be I.

The link is purely inductive and we do not expect any loss of active power in the link. This is borne out by the fact that P1 = P2. The link inductor has voltage across it and current through it. Therefore this inductor will consume positive reactive power. Hence, we expect Q2 to be less than Q1. Let QL be the reactive power absorbed by the link inductor. Then,

Obviously, QL is a positive quantity and hence Q2 < Q1.

Special Case δ = δ1δ2 << π/2 and V1 = V + V, V2 = V

Thus, in a synchronous link operating with small phase difference and voltage magnitude difference between sources, the active power flows from the leading source to the lagging source. The active power will be proportional to phase difference (in radians) and will be relatively independent of voltage magnitude difference. Positive reactive power flow will take place from the source with higher voltage magnitude to the source with lower voltage magnitude. Reactive power flow in the link is proportional to voltage magnitude difference and is relatively insensitive to phase difference.

Example: 7.10-2

A 50 Hz, 63.5 kV rms sub-station provides power to a large industrial consumer through a 20 km long high voltage line that can be modelled by a resistance of 5 Ω and inductive reactance of 20 Ω. The voltage magnitude at receiving end is to be maintained at 63.5 kV. This is done by adjusting the sending end voltage magnitude by tap-changing transformers or otherwise. If the consumer draws 20 MW of power at 0.707 lag power factor, find (i) the magnitude of sending end voltage and power factor, (ii) line current (iii) sending end active and reactive power, (iv) active and reactive power absorbed by the line impedance and (v) line power efficiency.

Solution

The magnitude of receiving end current = 20×106 ÷ (0.707×63.5×103) = 445.5 A rms

The angle of current with respect to receiving end voltage phasor = –cos–10.707 = – 45°

We take the receiving end voltage as the reference phasor. Then, VR = 63.5∠0° kV rms and I = 445.5∠–45° A rms.

Fig. 7.10-2 Circuit for Example 7.10-2

Active power delivered at receiving end = 20 MW

Reactive power delivered at receiving end = 63.5 kV × 0.4455 kA × sin 45° = 20 MVAr

Active power consumed by the line impedance = 5Ω × (0.4455 kA)2 = 1 MW

Reactive power consumed by the line impedance = 20Ω × (0.4455 kA)2 = 4 MVAr

∴ Active power at sending end = 20 + 1 = 21 MW

∴ Reactive power at sending end = 20 + 4 = 24 MVAr

∴ Complex power at sending end, S1 = 21 + j 24 MVA

Since S1 = V1 I*, V1 = S1 ÷ I * = (21 + j 24) × 106 ÷ (445.5∠–45°)* = 71.6∠3.8° kV rms.

The angle between sending end voltage phasor and current phasor = 3.8° – (–45°) = 48.8°. Therefore, sending end power factor = cos46.74° = 0.66 lag.

  1. Sending end voltage magnitude = 71.6 kV rms (12.75% above nominal value)
  2. Sending end power factor = 0.66 lag
  3. Sending end active power = 21 MW
  4. Sending end reactive power = 24 MVAr
  5. Active power loss in line = 1 MW
  6. Reactive power loss in line = 4 MVAr
  7. Line power efficiency = 95.2%

Example: 7.10-3

If a capacitor is connected directly across the load at customer side in the problem stated in Example: 7.10-2 such that the receiving end current is at unity power factor with respect to receiving end voltage, find the reactive power drawn by the capacitor and the capacitance value. Also calculate all the quantities calculated under Example: 7.10-2 and comment on the differences.

Solution

Refer to the circuit in Fig. 7.10-3. The capacitor should supply all the reactive power requirement of load, i.e., all of 20 MVAr if the current in the line at receiving end is to be at unity power factor. Therefore, the current taken by capacitor will be 20×106/63.5×103 = 315 A. Therefore, capacitive reactance = 63.5×103/315 = 201.6 Ω. This value is 1/ωC and ω = 2π× 50 = 100π. Therefore, C = 15.8 μF. With this capacitor in place, the current at receiving end of line will have a magnitude of 20×106/63.5×103 = 315 A and its angle with respect to voltage will be 0°. Then, VR = 63.5∠0° kV rms and I = 315∠0° A rms.

Fig. 7.10-3 Circuit for Example 7.10-3

Active power delivered at receiving end = 20 MW

Reactive Power delivered at receiving end = 63.5 kV × 0.315 kA × sin 0° = 20 MVAr

Active power consumed by the line impedance = 5Ω × (0.315 kA)2 = 0.5 MW

Reactive power consumed by the line impedance = 20Ω × (0.315 kA)2 = 2 MVAr

∴ Active power at sending end = 20 + 0.5=20.5 MW

∴ Reactive power at sending end = 0 + 2 = 2 MVAr

∴ Complex power at sending end, S1 = 20.5 + j 2 MVA

Since S1 = V1 I*, V1 = S1 ÷ I * = (20.5 + j 2)×106 ÷ (315∠–45°)* = 65.4∠5.6° kV rms.

The angle between sending end voltage phasor and current phasor = 5.6° – (0°) = 5.6°. Therefore sending end power factor = cos5.6° = 0.995 lag.

  1. Sending end voltage magnitude = 65.4 kV rms (3% above nominal value)
  2. Sending end power factor = 0.995 lag
  3. Sending end active power = 20.5 MW
  4. Sending end reactive power = 2 MVAr
  5. Active power loss in line = 0.5 MW
  6. Reactive power loss in line = 2 MVAr
  7. Line power efficiency = 97.6%

Comments on the results

A load that draws power at a lag power factor causes higher magnitude current in the line and source. Higher current magnitude results in higher voltage drop in the line, thereby requiring higher value of sending end voltage to maintain a specified receiving end voltage. Higher current magnitude results in higher active power loss in the line and thereby reduces power efficiency of the line.

The reactive component of load current undergoes a rotation by 90° to form the voltage drop in the line inductive reactance and results in an in-line voltage drop. An in-line voltage drop affects sending end voltage much more than a quadrature voltage drop. See the phasor diagram in Fig. 7.10-4.

Fig. 7.10-4 Phasor diagram of a line delivering power to a lagging load (Not to scale)

Therefore, reducing the reactive component of current drawn by a lagging load results in (i) lower current magnitude in the line and source (ii) lower line power loss and improved transmission efficiency (iii) lower voltage drop in the line. This reduction is effected by making a local capacitor act as a source of lagging reactive power required by the load. The line is thereby relieved from the task of supplying this reactive power. This is called capacitive compensation of lagging loads. Capacitive compensation is routinely employed in Power Systems and Industrial Electrical Systems.

Example: 7.10-4

A 230 V rms source supplies two loads in parallel. The first one draws 10 kVA at 0.8 lag power factor. The second one draws 10 kW at 0.8 lead power factor. Find the source current rms value, complex power delivered by source and source power factor.

Solution

Complex power of first load = 10×0.8 + j 10×sin(cos–10.8) = 8 + j6 kVA.

Complex power of second load = 10 – j (10/0.8) ×sin(cos–10.8) = 10–j7.5 kVA.

Complex power is a conserved quantity. Therefore, complex power delivered by source = total complex power delivered to loads = 18–j1.5 kVA. Source voltage is 230∠0° V rms. Therefore, source current = [(18 – j1.5) × 103/230]* = 78.53∠4.76° A rms.

Therefore, source current rms value is 78.53 A and source power factor is cos4.76° = 0.997 lead.

7.11 SUMMARY
  • Sinusoidal steady-state in a dynamic circuit is that state when all the response variables contain just one component with a sinusoidal waveshape with the frequency same as that of the sinusoidal forcing function applied. The response will, in general, have a phase difference with respect to input. This state will be established only after a transient period that follows the application of sources. Sinusoidal steady-state response in linear circuits obeys superposition principle.
  • The real part of steady-state response to a complex exponential function ejωt = steady-state response to cosωt and imaginary part of steady-state response to ejωt = steady-state response to sinωt.
  • All element voltage variables and all element current variables in a linear dynamic circuit driven by a complex exponential function Xm ejωt will assume the form (Ym ejϕ) ejωt under steady-state condition, where (Ym e) represents the relevant complex amplitude for the variables. Ym will be proportional to Xm.
  • The amplitude of current in an inductor is 1/ωL times the amplitude of voltage and the current lags the voltage by 90° under sinusoidal steady-state condition.
  • The amplitude of current in a capacitor is ωC times the amplitude of voltage and the current leads the voltage by 90° under sinusoidal steady-state condition.
  • Phasor is a complex number that gives the amplitude of complex exponential function and the phase of the complex exponential function with the time-variation of the function understood as ejωt. It can be used as a representation for a sinusoidal function.
  • The ratio of voltage phasor to current phasor of an element is called its phasor impedance. It is R Ω for a resistor, jωL Ω for an inductor and 1/ jωC for a capacitor. Phasor equivalent circuit is constructed for sinusoidal steady-state analysis by replacing all sources by their phasor values and all elements by their phasor impedances.
  • The nodal analysis and mesh analysis techniques developed for memoryless circuits apply to phasor equivalent circuits with no change except that impedance Z takes the place of resistance R and admittance Y takes the place of conductance G. All circuit theorems, except maximum power transfer theorem, apply to phasor equivalent circuits without modification.
  • Maximum average power is transferred to a load circuit from a power delivery circuit under sinusoidal steady-state when the driving-point impedance ZL = RL + jXL of the load is the conjugate of Thevenin’s impedance ZS = RS + jXS of the power delivery circuit.
  • A diagram depicting a group of coherent (i.e., of same angular frequency) complex exponential signals, frozen at their initial position, is called a phasor diagram. Angles measured in counter-clockwise direction in a phasor diagram are lead angles and angles measured in clockwise direction in a phasor diagram are lag angles.
  • Apparent power carried by a sinusoidal voltage of rms value Vrms and a sinusoidal current of rms value Irms is defined as the actual power that will be carried by a DC voltage of same effective value and a DC current of same effective value – i.e., Apparent Power = VrmsIrms.
  • Active Power, P = VrmsIrms cosθ, where θ is the angle by which the voltage phasor leads the current phasor and Power Factor = cosθ under sinusoidal steady-state.
  • The current phasor can be resolved into active component (= Irms cosθA rms) and reactive component (= –Irms sinθ A rms) by finding its projection along voltage phasor and along a perpendicular to voltage phasor respectively. The active current component carries the entire active power.
  • Reactive Power Q under sinusoidal steady-state condition is a quantity that stands for the reactive component of current. It is a scaled version of reactive component of current, the scaling factor being negative of rms value of voltage.
  • Complex power S in circuits under sinusoidal steady-state condition is defined as Complex power and its components – P and Q – are conserved quantities.
  • Let v(t) = Vm cos(ωt +ϕv) = √2Vrms cos(ωt +ϕv ) and i(t) = Im cos(ωt +ϕi) = √2Irms cos(ωt + ϕi) be the voltage and current as per passive sign convention in a load circuit. Let the series equivalent of the load circuit be RS + jXS and the parallel equivalent of the same circuit be RP + jXP. Then, the following table summarizes the various phasor quantities and their interrelations.
7.12 PROBLEMS
  1. Express v(t) = 5 cos(ωt – 45°) – 4 sin(ωt + 30°) as a single complex exponential function.
  2. What should be the values of A, ω and ϕ if the signal v(t) = (2 + j3)ej(10t + 0.5π) + Aej(ωt+ɸ) is a real-valued signal?
  3. The current in a particular element in a linear circuit excited by a sinusoidal voltage source vS(t) = 10cos(100t–60° ) V is found to be i(t) = 0.75sin(100t –15°) A. (i) What is the complex amplitude of current if vS(t) = 5ej100t V? (ii) Explain why you can not determine the complex amplitude of current when vS(t) = 5ej200t V using this data?
  4. Express the following signals as phasors by carrying out the addition in phasor domain. Draw the phasor diagrams.
    1.  x(t) = 10 sin 500 πt + 5 cos (500 πtπ/5)
    2.  x(t) = 7 sin(120 πt – 50°) + cos(120 πt + 30°)
    3.  x(t) = 7 cos(50πt) + 2cos(50πt + 30°)
      –3 sin (50πt) + 2 cos(50πt + π/4)
  5. Express the following phasors as time-domain signals after carrying out the required additions in phasor domain.
    1. 15∠–60° + 5e/3
    2. 20–j10 + 10∠–20°
    3. 4e/12 – 3e/8 + 3∠–50°
  6. Let v(t) = Vmcosωt V and i(t)= Im cos(ωt–ϕ) A be the voltage and current of an element in a linear circuit under sinusoidal steady-state. If the peak value of power pulsation is found to be twice the value of average power what must be the value of ϕ?
  7. Express the angular frequency at which a series RLC circuit excited by a sinusoidal voltage source will have the peak of double-frequency power pulsation equal to the average power in terms of circuit parameters.
  8. The current drawn by a linear load circuit from a sinusoidal voltage source vS(t) = Vmcosωt V is seen to be Im1cos(ω1t –30°) A when the angular frequency of voltage source is ω1 and Im2 cos(ω2t + 45°) A when it is ω2. Explain why there should exist a value of ω between ω1 and ω2 such that the circuit will draw power at unity power factor at that angular frequency.
  9. A resistor R1 in series with an inductor L is connected in parallel to another resistor R2 that is in series with a capacitor C. (i) What will be the nature of power factor – lag or lead – for very low frequency sinusoidal input voltage? (ii) What will be the nature of power factor – lag or lead – for very high frequency sinusoidal input voltage? (iii) Will there exist a value of angular frequency at which this load will have unity power factor?
  10. The current phasor drawn by a load circuit containing two circuit elements from a voltage of 100∠0° V rms is 10∠–36° A. Explain why the load circuit has to be an RL circuit?
  11. The power factor of a load circuit containing three circuit elements is found to be unity at ω = 100π rad/sec. Is it necessary that all the three elements are resistors?
  12. The power factor of a load circuit is found to be 0.7 lag at ω = 100π rad/sec. Is it necessary that the power factor is a lag power factor for all values of ω? If your answer is no, give an example circuit to justify the answer.
  13. The ratio of magnitudes of two load impedances is 1:2. If the first one has 0.7 lag power factor, what must be the power factor of the second one such that a parallel combination of these two loads draws power at unity power factor?
  14. The phasor impedance of a multi-element RLC circuit is 3 + j17 Ω at 100π rad/s. Show that there must be at least one resistor and one inductor in the circuit.
  15. The phasor impedance of a multi-element passive circuit is –j20 Ω at 100π rad/s. Show that the circuit contains at least one capacitor and that it contains no resistor.
  16. The current drawn by a multi-element passive circuit is found to lag the voltage phasor by 90°. Show that the circuit contains at least one inductor and no resistor.
  17. The power factor of a multi-element passive circuit is found to be 0.3 lead at 200 rad/s. It is found to be 0.4 lag at 400 rad/s. Show that the circuit contains at least one resistor, capacitor and inductor.
  18. The sum of reactive power delivered to 5 elements in a 6-element circuit is –20 kVAr. Show that the sixth element is either an independent source or an inductor.
  19. The sum of reactive power delivered to 4 elements in a 5-element circuit is + 10 kVAr and the sum of active power delivered to the same 4 elements is 20 kW. Show that the fifth element has to be an independent source and find the power factor at which it is delivering power.
  20. The sum of reactive power delivered to 4 elements in a 5-element circuit is –10 kVAr and the sum of active power delivered to the same 4 elements is 0 kW. Show that the fifth element has to be an inductor.
  21. The sum of complex power delivered to 7 elements in an 8-element circuit is 20–j10 VA. Identify the nature of the 8th element.
  22. A voltage source vS(t) = 325cos100πt V delivers power to a load through an impedance 0.5 + j4 Ω. The load voltage peak value is seen to be 350 V. Argue with the help of a phasor diagram that the load has to be a capacitive one.
  23. Find the equivalent impedance and admittance at ω = 100π rad/sec for the circuits in Fig. 7.12-1.

    Fig. 7.12-1

  24. A resistor of 200 Ω and an inductor of 0.5 H are in series. (i) Find the impedance of the combination at 60 Hz in rectangular form and polar form. (ii) Find a parallel RL circuit that has same impedance at same frequency. (iii) Find the impedance of the parallel equivalent in step (ii) for 50 Hz. Are the impedance values equal for the two circuits at 50 Hz?
  25. A resistor of 200 Ω and a capacitor of 0.05 mF are in parallel. (i) Find the impedance of the combination at 60 Hz in rectangular form and polar form. (ii) Find a series RC circuit that has same impedance at same frequency. (iii) Find the impedance of the series equivalent in step (ii) for 50 Hz. Are the impedance values equal for the two circuits at 50 Hz?
  26. The voltage across an impedance is v(t) = 100 sin120πt V and the current through it is i(t) = 5sin(120πt – 60°) A. Find the impedance and obtain its series equivalent and parallel equivalent. Can these equivalents be used at another frequency?
  27. Find the (i) current delivered by each source (ii) the complex power delivered by each source and power factor of each source (iii) the voltage of LN with respect to SN (iv) total active and reactive power delivered to the three load branches (v) the sum of instantaneous power delivered to the three load branches in the circuit shown in Fig. 7.12-2 .V1 = 110∠0° V rms, V2 = 110∠–120° V rms and V3 = 110∠120° V rms. The frequency of operation is 60 Hz. Use mesh analysis procedure. Show phasor diagram

    Fig. 7.12-2

  28. Repeat Problem 27 by using nodal analysis procedure. The node voltages at nodes between the resistor and inductor are not required. Take SN as the reference node.
  29. Find the phasor currents delivered by sources and the current In in the circuit in Fig. 7.12-3 by using Superposition Theorem. V1 = 110∠0° V rms, V2 = 110∠–120° V rms and V3 = 110∠120° V rms. The frequency of operation is 60 Hz. Draw the phasor diagram.

    Fig. 7.12-3

  30. (a) Find the phasor currents delivered by sources and the current In in the circuit in Fig. 7.12-4 by using Superposition Theorem. V1 = 110∠0° V rms, V2 = 110∠–120° V rms and V3 = 110∠120° V rms. (b) draw the phasor diagram showing all voltages and currents. The frequency of operation is 60 Hz. Also find (i) the complex power delivered by each source and its power factor and (ii) the sum of instantaneous power delivered to the three load branches in the circuit.

    Fig. 7.12-4

  31. Find the (i) current delivered by each source (ii) S delivered by each source and power factor of each source (iii) the voltage of LN with respect to SN (iv) total P and Q delivered to the three loads (v) the sum of instantaneous power delivered to the three load branches in the circuit shown in Fig. 7.12-5. V1 = 230∠0° V rms, V2 = 230∠–120° V rms and V3 = 230∠120° V rms. The frequency of operation is 50 Hz. Use node analysis procedure. Show phasor diagram.

    Fig. 7.12-5

  32. Find the (i) current delivered by each source (ii) S delivered by each source and power factor of each source (iii) the voltage of LN with respect to SN (iv) the current In in the circuit shown in Fig. 7.12-6. V1 = 100∠0° V rms, V2 = 120∠–140° V rms and V3 = 110∠110° V rms. The frequency of operation is 60 Hz. Use node analysis procedure. Show phasor diagram.

    Fig. 7.12-6

  33. Find the Thevenin’s equivalent of the circuit in Fig. 7.12-6 with respect to terminal pair LN-SN. Thereby find the current that would flow in a short-circuit put across SN-LN node pair.
  34. (i) What must be the value of RL in the circuit in Fig. 7.12-7 if maximum power is to be transferred to it? What is the maximum power transferred? (ii) How will the answer differ if an adjustable reactance XL can be put in series with RL and independent adjustment of RL and XL for maximum power transfer is possible?

    Fig. 7.12-7

  35. Find the current in 1Ω as a function of time by using source transformation theorem and current division principle in the circuit shown in Fig. 7.12-8. The frequency of the source is 60 Hz.

    Fig. 7.12-8

  36. Find the Norton’s Equivalent for the circuit in Fig. 7.12-9 for ω = 1000 rad/sec.

    Fig. 7.12-9

  37. Two impedances in parallel are supplied by V = 100∠–0° V rms. The source is seen to deliver a power of 10 kW at 0.8 lag power factor. The power consumed by the first impedance is 4 kW at 0.9 lead power factor. (i) Find the currents in the impedances and impedance values (ii) power factor and reactive power consumption of second impedance (iii) source current, source power factor and complex power delivered to the impedances if these two impedances are connected in series across the same voltage source.
  38. Find the Thevenin’s equivalent of the circuit in Fig. 7.12-10 across a–b if vS1(t) = 100 sin120πt V and vS2(t) = 100 sin(120πt–60°) V.

    Fig. 7.12-10

  39. Two impedances Zl = 6 + j8 Ω and Z2 = 8–j6 Ω are in series and the whole combination is in parallel with a third impedance Z3 = 5 + j5 Ω. The circuit is driven by a sinusoidal current source iS(t) = 10 cos(120πt–30°) A. (i) Solve the circuit by phasor diagram method (ii) Find the complex power delivered to the three impedances. (iii) Verify the conservation of active power and reactive power in the circuit.
  40. The star–delta transformation equation developed for resistive circuits is applicable to impedances in phasor equivalent circuits. Apply star–delta transformation and obtain the complex power delivered to the Z in the circuit in Fig. 7.12-11

    Fig. 7.12-11

  41. A 230 V rms, 50 Hz distribution line feeds power to a load located at the far end of the line. The line can be modelled by a series combination of 0.07 Ω resistance and 0.3 Ω inductive reactance. The load is represented by impedance of 15 + j15 Ω. (i) Obtain the load voltage and line current by phasor diagram method. (ii) Calculate the source complex power, source power factor and load complex power and transmission efficiency.
  42. A 110 V rms, 60 Hz distribution line feeds power to a load located at the far end of the line. The line can be modelled by a series combination of 0.05 Ω resistance and 0.2 Ω inductive reactance. The load is represented by impedance of 5 + j10 Ω. (i) Obtain the load voltage and line current. (ii) Find the capacitance value of a capacitor that should be connected across the load if the sending end and receiving end voltage magnitudes are to be 230 V rms. (ii) Calculate the source complex power, source power factor and load complex power and transmission efficiency with and without the capacitor.
  43. If the source delivers 1 kW at unity power factor in the circuit in Fig. 7.12-12 determine the impedance Z.

    Fig. 7.12-12

  44. The current delivered by the source in the circuit in Fig. 7.12-13 is 10 cos(120πt – 15°) A under steady-state condition. The load impedance Z1 is seen to consume 300 W of active power and the load Z2 is found to deliver 300 VAr of reactive power. (i) Find the currents delivered to the impedances as functions of time. (ii) the impedance values.

    Fig. 7.12-13

  45. A motor connected to a 50 Hz, 230 V rms supply line draws 9 A rms and consumes 1.6 kW. (i) Find the apparent power, reactive power and power factor. (ii) Find the capacitance of a parallel capacitor that will make the power factor at the source unity. (iii) Find the source current with this capacitor installed.
  46. Find the complex power delivered by the current source in the circuit in Fig. 7.12-14.

    Fig. 7.12-14

  47. Find the value of angular frequency such that vo(t) = vS(t) in the circuit in in Fig. 7.12-15 if vS(t) = Vm cosωt V. Assume ideal opamp model for the Opamp..

    Fig. 7.12-15

  48. Using the approximate power flow equations for a synchronous link, find out the complex power delivered by the two sources, currents delivered by the sources and power factor at which they are operating in the circuit shown in Fig. 7.12-16. Also find the voltage phasor at node C. (Hint – Let the voltage at C be Vδ. Then AC and BC are two synchronous links.)

    Fig. 7.12-16

  49. The current source at C in Fig. 7.12-17 can deliver only Q. Q delivered by it is adjusted such that the voltage at C is 1.0 V rms. (i) Find the Q that it has to deliver. (ii) Find the S delivered by the two voltage sources. (iii) Find the angle of voltage phasor at node C. Use synchronous link equations.

    Fig. 7.12-17